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Searched +full:0 +full:x1fd00000 (Results 1 – 6 of 6) sorted by relevance

/linux/arch/mips/include/asm/mips-boards/
H A Dmalta.h17 #define MIPS_MSC01_IC_REG_BASE 0x1bc40000
18 #define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000
25 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
32 return (unsigned long) ioremap (((addr & 0xffff) << 21), 0x10000); in get_gt_port_base()
39 return (unsigned long) ioremap(addr, 0x10000); in get_msc_port_base()
45 #define GCMP_BASE_ADDR 0x1fbf8000
51 #define GIC_BASE_ADDR 0x1bdc0000
57 #define CPC_BASE_ADDR 0x1bde0000
63 #define MSC01_BIU_REG_BASE 0x1bc80000
65 #define MSC01_SC_CFG_OFS 0x0110
[all …]
H A Dbonito64.h42 #define BONITO_BOOT_BASE 0x1fc00000
43 #define BONITO_BOOT_SIZE 0x00100000
45 #define BONITO_FLASH_BASE 0x1c000000
46 #define BONITO_FLASH_SIZE 0x03000000
48 #define BONITO_SOCKET_BASE 0x1f800000
49 #define BONITO_SOCKET_SIZE 0x00400000
51 #define BONITO_REG_BASE 0x1fe00000
52 #define BONITO_REG_SIZE 0x00040000
54 #define BONITO_DEV_BASE 0x1ff00000
55 #define BONITO_DEV_SIZE 0x00100000
[all …]
/linux/arch/mips/boot/dts/loongson/
H A Dloongson1.dtsi18 #clock-cells = <0>;
23 #size-cells = <0>;
25 cpu0: cpu@0 {
26 reg = <0>;
37 #address-cells = <0>;
44 ranges = <0x0 0x1fd00000 0x130000>;
48 reg = <0x1040 0x18>;
57 reg = <0x1058 0x18>;
66 reg = <0x1070 0x18>;
75 reg = <0x1088 0x18>;
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sa8775p.yaml101 reg = <0x0 0x01c00000 0x0 0x3000>,
102 <0x0 0x40000000 0x0 0xf20>,
103 <0x0 0x40000f20 0x0 0xa8>,
104 <0x0 0x40001000 0x0 0x4000>,
105 <0x0 0x40100000 0x0 0x100000>,
106 <0x0 0x01c03000 0x0 0x1000>;
108 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
109 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
111 bus-range = <0x00 0xff>;
113 linux,pci-domain = <0>;
[all …]
H A Dqcom,pcie-sc7280.yaml97 reg = <0 0x01c08000 0 0x3000>,
98 <0 0x40000000 0 0xf1d>,
99 <0 0x40000f20 0 0xa8>,
100 <0 0x40001000 0 0x1000>,
101 <0 0x40100000 0 0x100000>;
103 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
104 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
106 bus-range = <0x00 0xff>;
159 interrupt-map-mask = <0 0 0 0x7>;
160 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux/arch/mips/include/asm/mach-loongson2ef/
H A Dloongson.h60 for (x = 0; x < 100000; x++) \
69 #define LOONGSON_FLASH_BASE 0x1c000000
70 #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
73 #define LOONGSON_LIO0_BASE 0x1e000000
74 #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */
77 #define LOONGSON_BOOT_BASE 0x1fc00000
78 #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */
80 #define LOONGSON_REG_BASE 0x1fe00000
81 #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
84 #define LOONGSON_LIO1_BASE 0x1ff00000
[all …]