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/freebsd/sys/contrib/device-tree/Bindings/mtd/partitions/
H A Dbrcm,bcm4908-partitions.yaml33 "^partition@[0-9a-f]+$":
53 partition@0 {
55 reg = <0x0 0x100000>;
60 reg = <0x100000 0xf00000>;
65 reg = <0x1000000 0xf00000>;
70 reg = <0x1f00000 0x100000>;
/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dpwm-tiehrpwm.txt24 reg = <0x48300200 0x100>;
32 reg = <0x48300200 0x80>;
41 reg = <0x1f00000 0x2000>;
47 reg = <0x4843e200 0x80>;
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_gtt_values.h32 0,
33 0,
34 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
35 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
36 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
37 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
38 0x1d80, /* win 6: addr=0x1d80000, size=4096 bytes */
39 0x1d81, /* win 7: addr=0x1d81000, size=4096 bytes */
40 0x1d82, /* win 8: addr=0x1d82000, size=4096 bytes */
41 0x1e00, /* win 9: addr=0x1e00000, size=4096 bytes */
[all …]
H A Dcommon_hsi.h50 #define ISCSI_CDU_TASK_SEG_TYPE 0
51 #define FCOE_CDU_TASK_SEG_TYPE 0
65 #define YSTORM_QZONE_SIZE 0
66 #define PSTORM_QZONE_SIZE 0
104 #define FW_ENGINEERING_VERSION 0
182 #define CDU_SEG_TYPE_OFFSET_REG_OFFSET_MASK (0x1ffff)
185 #define CDU_VF_FL_SEG_TYPE_OFFSET_REG_OFFSET_MASK (0xfff)
187 #define CDU_CONTEXT_VALIDATION_CFG_ENABLE_SHIFT (0)
199 #define DQ_DEMS_LEGACY 0
205 #define DQ_XCM_AGG_VAL_SEL_WORD2 0
[all …]
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Drs90.dts16 reg = <0x0 0x2000000>;
26 reg = <0x1f00000 0x100000>;
42 pwms = <&pwm 3 40000 0>;
44 brightness-levels = <0 16 32 48 64 80 112 144 192 255>;
48 pinctrl-0 = <&pins_pwm3>;
53 keys@0 {
56 key-0 {
113 key@0 {
169 #phy-cells = <0>;
234 pinctrl-0 = <&pins_mmc1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-npcm730-gsj.dts35 reg = <0 0x40000000>;
47 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
135 pinctrl-0 = <&spi0cs1_pins>;
138 flash@0 {
142 reg = <0>;
149 bmc@0 {
151 reg = <0x000000 0x2000000>;
153 u-boot@0 {
[all...]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi29 reg = <0x03200000 0x800000>;
82 pinctrl-0 = <&backlight_i2c_default_state>;
88 #size-cells = <0>;
92 reg = <0x2c>;
94 dev-ctrl = /bits/ 8 <0x80>;
95 init-brt = /bits/ 8 <0x3f>;
97 pwms = <&backlight_pwm 0 100000>;
101 rom-addr = /bits/ 8 <0xa0>;
102 rom-val = /bits/ 8 <0x44>;
106 rom-addr = /bits/ 8 <0xa1>;
[all …]
H A Dqcom-apq8026-samsung-milletwifi.dts37 reg = <0x03200000 0x800000>;
90 pinctrl-0 = <&backlight_i2c_default_state>;
96 #size-cells = <0>;
100 reg = <0x2c>;
103 dev-ctrl = /bits/ 8 <0x80>;
104 init-brt = /bits/ 8 <0x3f>;
112 rom-addr = /bits/ 8 <0xa3>;
113 rom-val = /bits/ 8 <0x5e>;
118 * (0, 120deg, 240deg, -, -, -),
122 rom-addr = /bits/ 8 <0xa5>;
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DRISCVInstructions.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40 return std::memcmp(this, &r, sizeof(NAME)) == 0; \
315 constexpr uint32_t DecodeRD(uint32_t inst) { return (inst & 0xF80) >> 7; } in DecodeRD()
316 constexpr uint32_t DecodeRS1(uint32_t inst) { return (inst & 0xF8000) >> 15; } in DecodeRS1()
317 constexpr uint32_t DecodeRS2(uint32_t inst) { return (inst & 0x1F00000) >> 20; } in DecodeRS2()
319 return (inst & 0xF0000000) >> 27; in DecodeRS3()
321 constexpr uint32_t DecodeFunct3(uint32_t inst) { return (inst & 0x7000) >> 12; } in DecodeFunct3()
323 return (inst & 0xE000000) >> 25; in DecodeFunct2()
326 return (inst & 0xFE000000) >> 25; in DecodeFunct7()
333 return val | 0xFFFF'FFFF'0000'0000; in NanBoxing()
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc8379_mds.dts26 #size-cells = <0>;
28 PowerPC,8379@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x20000000>; // 512MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
55 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
H A Dmpc8378_mds.dts28 #size-cells = <0>;
30 PowerPC,8378@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
57 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
H A Dmpc8377_mds.dts28 #size-cells = <0>;
30 PowerPC,8377@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
57 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1012a.dtsi32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
94 <0x0 0x1404000 0 0x2000>, /* GICH */
[all …]
H A Dfsl-ls1043a.dtsi37 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0>;
49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
58 reg = <0x1>;
59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
68 reg = <0x2>;
69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
78 reg = <0x3>;
79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8994.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
70 reg = <0x0 0x2>;
78 reg = <0x0 0x3>;
86 reg = <0x0 0x100>;
99 reg = <0x0 0x101>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]