Home
last modified time | relevance | path

Searched +full:0 +full:x1e6e2000 (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed,ast2x00-scu.yaml50 '^p2a-control@[0-9a-f]+$':
54 '^pinctrl(@[0-9a-f]+)?$':
68 '^interrupt-controller@[0-9a-f]+$':
72 '^silicon-id@[0-9a-f]+$':
111 reg = <0x1e6e2000 0x1a8>;
117 ranges = <0x0 0x1e6e2000 0x1000>;
121 reg = <0x7c 0x4>, <0x150 0x8>;
/linux/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2400-pinctrl.yaml202 reg = <0x1e6e2000 0x1a8>;
208 ranges = <0x0 0x1e6e2000 0x1000>;
H A Daspeed,ast2500-pinctrl.yaml37 0: compatible with "aspeed,ast2500-gfx", "syscon"
231 reg = <0x1e6e2000 0x1a8>;
237 ranges = <0x0 0x1e6e2000 0x1000>;
H A Daspeed,ast2600-pinctrl.yaml514 reg = <0x1e6e2000 0xf6c>;
520 ranges = <0x0 0x1e6e2000 0x1000>;
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Daspeed,ast2xxx-scu-ic.txt15 ranges = <0 0x1e6e2000 0x1a8>;
/linux/Documentation/devicetree/bindings/misc/
H A Daspeed-p2a-ctrl.txt40 reg = <0x1e6e2000 0x1a8>;
/linux/drivers/gpu/drm/ast/
H A Dast_dp501.c39 sendack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0xff); in send_ack()
40 sendack |= 0x80; in send_ack()
41 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0x00, sendack); in send_ack()
47 sendack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0xff); in send_nack()
48 sendack &= ~0x80; in send_nack()
49 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0x00, sendack); in send_nack()
55 u32 retry = 0; in wait_ack()
57 waitack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd2, 0xff); in wait_ack()
58 waitack &= 0x80; in wait_ack()
71 u32 retry = 0; in wait_nack()
[all …]
H A Dast_post.c40 static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
41 static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff };
49 for (i = 0x81; i <= 0x9f; i++) in ast_set_def_ext_reg()
50 ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00); in ast_set_def_ext_reg()
57 index = 0xa0; in ast_set_def_ext_reg()
58 while (*ext_reg_info != 0xff) { in ast_set_def_ext_reg()
59 ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info); in ast_set_def_ext_reg()
65 /* ast_set_index_reg-mask(ast, AST_IO_VGACRI, 0xa1, 0xff, 0x3); */ in ast_set_def_ext_reg()
68 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01); in ast_set_def_ext_reg()
69 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00); in ast_set_def_ext_reg()
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g4.dtsi36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
47 reg = <0x40000000 0>;
57 reg = <0x1e620000 0x94>, <0x20000000 0x10000000>;
59 #size-cells = <0>;
64 flash@0 {
65 reg = < 0 >;
102 reg = <0x1e630000 0x18>, <0x30000000 0x10000000>;
104 #size-cells = <0>;
[all …]
H A Daspeed-g6.dtsi48 #size-cells = <0>;
54 reg = <0xf00>;
60 reg = <0xf01>;
78 reg = <0x1e6e0000 0x174>;
79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
95 reg = <0x40461000 0x1000>,
96 <0x40462000 0x1000>,
97 <0x40464000 0x2000>,
98 <0x40466000 0x2000>;
103 reg = <0x1e600000 0x100>;
[all …]
H A Daspeed-g5.dtsi37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0>;
48 reg = <0x80000000 0>;
58 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
60 #size-cells = <0>;
65 flash@0 {
66 reg = < 0 >;
89 reg = <0x1e630000 0xc4>, <0x30000000 0x08000000>;
91 #size-cells = <0>;
[all …]