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Searched +full:0 +full:x1d7d (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A D	dce_6_0_d.h	`26 #define ixATTR00 0x0000 27 #define ixATTR01 0x0001 28 #define ixATTR02 0x0002 29 #define ixATTR03 0x0003 30 #define ixATTR04 0x0004 31 #define ixATTR05 0x0005 32 #define ixATTR06 0x0006 33 #define ixATTR07 0x0007 34 #define ixATTR08 0x0008 35 #define ixATTR09 0x0009 [all …]`
H A D	dce_8_0_d.h	`27 #define mmPIPE0_PG_CONFIG 0x1760 28 #define mmPIPE0_PG_ENABLE 0x1761 29 #define mmPIPE0_PG_STATUS 0x1762 30 #define mmPIPE1_PG_CONFIG 0x1764 31 #define mmPIPE1_PG_ENABLE 0x1765 32 #define mmPIPE1_PG_STATUS 0x1766 33 #define mmPIPE2_PG_CONFIG 0x1768 34 #define mmPIPE2_PG_ENABLE 0x1769 35 #define mmPIPE2_PG_STATUS 0x176a 36 #define mmPIPE3_PG_CONFIG 0x176c [all …]`
H A D	dce_11_0_d.h	`27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmDCFEV0_PG_CONFIG 0x2db [all …]`
H A D	dce_10_0_d.h	`27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmPIPE3_PG_CONFIG 0x2c9 [all …]`
H A D	dce_11_2_d.h	`27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmPIPE3_PG_CONFIG 0x2c9 [all …]`
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A D	dcn_1_0_offset.h	`27 // base address: 0x1300000 31 // base address: 0x1300000 35 // base address: 0x1300000 39 // base address: 0x1300000 43 // base address: 0x1300000 47 // base address: 0x1300020 51 // base address: 0x1300040 55 // base address: 0x1300060 59 // base address: 0x1300080 63 // base address: 0x13000a0 [all …]`