Searched +full:0 +full:x1bdc0000 (Results 1 – 4 of 4) sorted by relevance
61 - minimum: 0112 reg = <0x1bdc0000 0x20000>;130 reg = <0x1bdc0000 0x20000>;
17 #define MIPS_MSC01_IC_REG_BASE 0x1bc4000018 #define MIPS_SOCITSC_IC_REG_BASE 0x1ffa000025 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))32 return (unsigned long) ioremap (((addr & 0xffff) << 21), 0x10000); in get_gt_port_base()39 return (unsigned long) ioremap(addr, 0x10000); in get_msc_port_base()45 #define GCMP_BASE_ADDR 0x1fbf800051 #define GIC_BASE_ADDR 0x1bdc000057 #define CPC_BASE_ADDR 0x1bde000063 #define MSC01_BIU_REG_BASE 0x1bc8000065 #define MSC01_SC_CFG_OFS 0x0110[all …]
7 /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */8 /memreserve/ 0x00001000 0x000ef000; /* YAMON */9 /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */25 reg = <0x1bdc0000 0x20000>;56 reg = <0x1e000000 0x400000>;66 yamon@0 {68 reg = <0x0 0x100000>;74 reg = <0x100000 0x2e0000>;79 reg = <0x3e0000 0x20000>;87 reg = <0x1f000000 0x1000>;[all …]
23 #size-cells = <0>;25 cpu0: cpu@0 {28 reg = <0>;46 reg = <0x18100000 0x200>;56 pinctrl-0 = <&i2c0_pins>;59 #size-cells = <0>;64 reg = <0x18100200 0x200>;74 pinctrl-0 = <&i2c1_pins>;77 #size-cells = <0>;82 reg = <0x18100400 0x200>;[all …]