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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-prt8mm.dts22 reg = <0x0 0x40000000 0 0x40000000>;
28 pinctrl-0 = <&pinctrl_gpio_leds>;
32 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
64 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x34>;
70 #sound-dai-cells = <0>;
77 pinctrl-0 = <&pinctrl_i2c2>;
82 reg = <0x60>;
83 regulator-name = "0V9_CORE";
94 pinctrl-0 = <&pinctrl_i2c3>;
[all …]
H A Dimx8mm-evk.dts42 pinctrl-0 = <&pinctrl_flexspi>;
45 flash@0 {
46 reg = <0>;
60 pinctrl-0 = <&pinctrl_usdhc3>;
71 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
72 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
73 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
74 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
75 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
76 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
[all …]
H A Dimx8mn-var-som.dtsi20 reg = <0x0 0x40000000 0 0x40000000>;
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
62 pinctrl-0 = <&pinctrl_ecspi1>;
64 <&gpio1 0 GPIO_ACTIVE_LOW>;
70 touchscreen@0 {
71 reg = <0>;
74 pinctrl-0
[all...]
H A Dimx8mm-var-som.dtsi18 reg = <0x0 0x40000000 0 0x80000000>;
24 pinctrl-0 = <&pinctrl_reg_eth_phy>;
71 pinctrl-0 = <&pinctrl_ecspi1>;
73 <&gpio1 0 GPIO_ACTIVE_LOW>;
79 touchscreen@0 {
80 reg = <0>;
83 pinctrl-0 = <&pinctrl_restouch>;
107 pinctrl-0 = <&pinctrl_fec1>;
116 #size-cells = <0>;
131 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mp-var-som.dtsi25 led-0 {
27 gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
34 reg = <0x0 0x40000000 0 0xc0000000>,
35 <0x1 0x00000000 0 0xc0000000>;
70 pinctrl-0 = <&pinctrl_i2c1>;
75 reg = <0x25>;
77 pinctrl-0 = <&pinctrl_pmic>;
169 pinctrl-0 = <&pinctrl_i2c3>;
175 reg = <0x20>;
177 pinctrl-0 = <&pinctrl_pca9534>;
[all …]
H A Dimx8mp-icore-mx8mp.dtsi31 pinctrl-0 = <&pinctrl_i2c1>;
39 pinctrl-0 = <&pinctrl_pmic>;
40 reg = <0x25>;
119 pinctrl-0 = <&pinctrl_usdhc3>;
128 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
129 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
135 MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x41
141 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
142 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
143 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
[all …]
H A Dimx8mp-navqp.dts24 pinctrl-0 = <&pinctrl_gpio_led>;
26 led-0 {
37 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
66 pinctrl-0 = <&pinctrl_eqos>;
74 #size-cells = <0>;
76 ethphy0: ethernet-phy@0 {
78 reg = <0>;
91 pinctrl-0 = <&pinctrl_i2c1>;
96 reg = <0x25>;
98 pinctrl-0 = <&pinctrl_pmic>;
[all …]
H A Dimx8mm-ucm-som.dtsi23 pwms = <&pwm2 0 3000000 0>;
24 brightness-levels = <0 255>;
33 pinctrl-0 = <&pinctrl_gpio_led>;
44 #clock-cells = <0>;
109 pinctrl-0 = <&pinctrl_fec1>;
117 #size-cells = <0>;
119 ethphy0: ethernet-phy@0 {
121 reg = <0>;
129 pinctrl-0 = <&pinctrl_i2c2>;
133 reg = <0x4b>;
[all …]
H A Dimx8mm-icore-mx8mm.dtsi30 pinctrl-0 = <&pinctrl_fec1>;
36 #size-cells = <0>;
50 pinctrl-0 = <&pinctrl_i2c1>;
55 reg = <0x08>;
148 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
149 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
150 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
151 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
152 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
153 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
[all …]
H A Dimx8mp-beacon-som.dtsi14 reg = <0x0 0x40000000 0 0xc0000000>,
15 <0x1 0x00000000 0 0xc0000000>;
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
49 pinctrl-0 = <&pinctrl_eqos>;
60 #size-cells = <0>;
77 snps,priority = <0x1>;
78 snps,map-to-dma-channel = <0>;
83 snps,priority = <0x2>;
89 snps,priority = <0x4>;
95 snps,priority = <0x8>;
[all …]
H A Dimx8mm-beacon-som.dtsi17 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
26 reg = <0x0 0x40000000 0 0x80000000>;
68 pinctrl-0 = <&pinctrl_fec1>;
76 #size-cells = <0>;
78 ethphy0: ethernet-phy@0 {
80 reg = <0>;
87 pinctrl-0
[all...]
H A Dimx8mn-beacon-som.dtsi18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
27 reg = <0x0 0x40000000 0 0x80000000>;
76 pinctrl-0 = <&pinctrl_fec1>;
86 #size-cells = <0>;
88 ethphy0: ethernet-phy@0 {
90 reg = <0>;
97 pinctrl-0
[all...]
H A Dimx8mm-emtop-som.dtsi25 pinctrl-0 = <&pinctrl_gpio_led>;
27 led-0 {
54 pinctrl-0 = <&pinctrl_i2c1>;
59 reg = <0x25>;
61 pinctrl-0 = <&pinctrl_pmic>;
159 pinctrl-0 = <&pinctrl_uart2>;
165 pinctrl-0 = <&pinctrl_usdhc3>;
175 pinctrl-0 = <&pinctrl_wdog>;
183 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
184 MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
[all …]
H A Dimx8mp-debix-model-a.dts38 pinctrl-0 = <&pinctrl_gpio_led>;
40 led-0 {
51 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
62 pinctrl-0 = <&pinctrl_reg_usb_hub>;
89 pinctrl-0 = <&pinctrl_eqos>;
97 #size-cells = <0>;
99 ethphy0: ethernet-phy@0 { /* RTL8211E */
101 reg = <0>;
115 pinctrl-0 = <&pinctrl_hdmi>;
134 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mm-kontron-n801x-som.dtsi19 reg = <0x0 0x40000000 0 0x80000000>;
65 pinctrl-0 = <&pinctrl_ecspi1>;
69 flash@0 {
72 reg = <0>;
79 pinctrl-0 = <&pinctrl_i2c1>;
84 reg = <0x25>;
86 pinctrl-0 = <&pinctrl_pmic>;
88 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
189 pinctrl-0 = <&pinctrl_uart3>;
195 pinctrl-0 = <&pinctrl_usdhc1>;
[all …]
H A Dimx8mp-venice-gw702x.dtsi18 reg = <0x0 0x40000000 0 0x80000000>;
34 interrupts = <0>;
85 pinctrl-0 = <&pinctrl_eqos>;
93 #size-cells = <0>;
95 ethphy0: ethernet-phy@0 {
97 pinctrl-0 = <&pinctrl_ethphy0>;
99 reg = <0x0>;
109 #size-cells = <0>;
132 pinctrl-0 = <&pinctrl_i2c1>;
140 reg = <0x20>;
[all …]
H A Dimx8mm-kontron-sl.dtsi19 reg = <0x0 0x40000000 0 0x80000000>;
61 pinctrl-0 = <&pinctrl_ecspi1>;
65 flash@0 {
68 reg = <0>;
75 partition@0 {
77 reg = <0x0 0x1e0000>;
82 reg = <0x1e0000 0x10000>;
87 reg = <0x1f0000 0x10000>;
96 pinctrl-0 = <&pinctrl_i2c1>;
101 reg = <0x25>;
[all …]
H A Dimx8mm-nitrogen-r2.dts30 pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
57 pinctrl-0 = <&pinctrl_sound_wm8960>;
83 pinctrl-0 = <&pinctrl_ecspi2>;
90 pinctrl-0 = <&pinctrl_fec1>;
98 #size-cells = <0>;
110 pinctrl-0 = <&pinctrl_flexspi>;
117 pinctrl-0 = <&pinctrl_i2c1>;
122 reg = <0x8>;
214 pinctrl-0 = <&pinctrl_i2c3>;
219 reg = <0x7
[all...]
H A Dimx8mp-phycore-som.dtsi21 reg = <0x0 0x40000000 0 0x80000000>;
53 pinctrl-0 = <&pinctrl_fec>;
61 #size-cells = <0>;
63 ethphy1: ethernet-phy@0 {
65 reg = <0>;
78 pinctrl-0 = <&pinctrl_flexspi0>;
81 som_flash: flash@0 {
83 reg = <0>;
93 pinctrl-0 = <&pinctrl_i2c1>;
101 reg = <0x25>;
[all …]
H A Dimx8mm-venice-gw72xx.dtsi20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_pps>;
62 pinctrl-0 = <&pinctrl_reg_usb1_en>;
73 pinctrl-0 = <&pinctrl_reg_usb2_en>;
86 pinctrl-0 = <&pinctrl_spi2>;
93 reg = <0x1>;
117 pinctrl-0 = <&pinctrl_i2c2>;
122 pinctrl-0
[all...]
/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvf610-pinfunc.h14 #define ALT0 0x0
15 #define ALT1 0x1
16 #define ALT2 0x2
17 #define ALT3 0x3
18 #define ALT4 0x4
19 #define ALT5 0x5
20 #define ALT6 0x6
21 #define ALT7 0x7
24 #define VF610_PAD_PTA6__GPIO_0 0x000 0x000 ALT0 0x0
25 #define VF610_PAD_PTA6__RMII_CLKOUT 0x000 0x000 ALT1 0x0
[all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Ddm814.h8 #define DM814_CLKCTRL_OFFSET 0x0
12 #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58)
15 #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150)
16 #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154)
17 #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158)
18 #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c)
19 #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160)
20 #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164)
21 #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168)
22 #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c)
[all …]
H A Ddm816.h8 #define DM816_CLKCTRL_OFFSET 0x0
12 #define DM816_USB_OTG_HS_CLKCTRL DM816_CLKCTRL_INDEX(0x58)
15 #define DM816_UART1_CLKCTRL DM816_CLKCTRL_INDEX(0x150)
16 #define DM816_UART2_CLKCTRL DM816_CLKCTRL_INDEX(0x154)
17 #define DM816_UART3_CLKCTRL DM816_CLKCTRL_INDEX(0x158)
18 #define DM816_GPIO1_CLKCTRL DM816_CLKCTRL_INDEX(0x15c)
19 #define DM816_GPIO2_CLKCTRL DM816_CLKCTRL_INDEX(0x160)
20 #define DM816_I2C1_CLKCTRL DM816_CLKCTRL_INDEX(0x164)
21 #define DM816_I2C2_CLKCTRL DM816_CLKCTRL_INDEX(0x168)
22 #define DM816_TIMER1_CLKCTRL DM816_CLKCTRL_INDEX(0x170)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmicrochip,lan966x-oic.yaml49 reg = <0xe00c0120 0x190>;
52 interrupts = <0>;
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Deeprom.h12 MT_EE_CHIP_ID = 0x000,
13 MT_EE_VERSION = 0x002,
14 MT_EE_MAC_ADDR = 0x004,
15 MT_EE_MAC_ADDR2 = 0x00a,
16 MT_EE_WIFI_CONF = 0x190,
17 MT_EE_MAC_ADDR3 = 0x2c0,
18 MT_EE_RATE_DELTA_2G = 0x1400,
19 MT_EE_RATE_DELTA_5G = 0x147d,
20 MT_EE_RATE_DELTA_6G = 0x154a,
21 MT_EE_TX0_POWER_2G = 0x1300,
[all …]

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