/linux/drivers/clk/axs10x/ |
H A D | i2s_pll_clock.c | 19 #define PLL_IDIV_REG 0x0 20 #define PLL_FBDIV_REG 0x4 21 #define PLL_ODIV0_REG 0x8 22 #define PLL_ODIV1_REG 0xC 34 { 1024000, 0x104, 0x451, 0x10E38, 0x2000 }, 35 { 1411200, 0x104, 0x596, 0x10D35, 0x2000 }, 36 { 1536000, 0x208, 0xA28, 0x10B2C, 0x2000 }, 37 { 2048000, 0x82, 0x451, 0x10E38, 0x2000 }, 38 { 2822400, 0x82, 0x596, 0x10D35, 0x2000 }, 39 { 3072000, 0x104, 0xA28, 0x10B2C, 0x2000 }, [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/smu/ |
H A D | smu_8_0_d.h | 27 #define ixTHM_TCON_CSR_CONFIG 0xd82014a4 28 #define ixTHM_TCON_CSR_DATA 0xd82014a8 29 #define ixTHM_TCON_HTC 0xd8200c64 30 #define ixTHM_TCON_CUR_TMP 0xd8200ca4 31 #define ixTHM_TCON_THERM_TRIP 0xd8200ce4 32 #define ixTHM_GPIO_PROCHOT_CTRL 0xd8200d00 33 #define ixTHM_GPIO_THERMTRIP_CTRL 0xd8200d04 34 #define ixTHM_THERMAL_INT_ENA 0xd8200d10 35 #define ixTHM_THERMAL_INT_CTRL 0xd8200d14 36 #define ixTHM_THERMAL_INT_STATUS 0xd8200d18 [all …]
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H A D | smu_7_1_1_d.h | 27 #define mmGCK_SMC_IND_INDEX 0x80 28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80 29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82 30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84 31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86 32 #define mmGCK_SMC_IND_DATA 0x81 33 #define mmGCK0_GCK_SMC_IND_DATA 0x81 34 #define mmGCK1_GCK_SMC_IND_DATA 0x83 35 #define mmGCK2_GCK_SMC_IND_DATA 0x85 36 #define mmGCK3_GCK_SMC_IND_DATA 0x87 [all …]
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/linux/tools/perf/pmu-events/arch/x86/amdzen1/ |
H A D | data-fabric.json | 4 …Description": "Remote Link Controller Outbound Packet Types: Data (32B): Remote Link Controller 0", 5 "EventCode": "0x7c7", 6 "UMask": "0x02", 13 "EventCode": "0x807", 14 "UMask": "0x02", 21 "EventCode": "0x847", 22 "UMask": "0x02", 29 "EventCode": "0x887", 30 "UMask": "0x02", 36 …ion": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channel Controller 0", [all …]
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/linux/tools/perf/pmu-events/arch/x86/amdzen2/ |
H A D | data-fabric.json | 4 …Description": "Remote Link Controller Outbound Packet Types: Data (32B): Remote Link Controller 0", 5 "EventCode": "0x7c7", 6 "UMask": "0x02", 13 "EventCode": "0x807", 14 "UMask": "0x02", 21 "EventCode": "0x847", 22 "UMask": "0x02", 29 "EventCode": "0x887", 30 "UMask": "0x02", 36 …ion": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channel Controller 0", [all …]
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/linux/tools/perf/pmu-events/arch/x86/amdzen3/ |
H A D | data-fabric.json | 4 …Description": "Remote Link Controller Outbound Packet Types: Data (32B): Remote Link Controller 0", 5 "EventCode": "0x7c7", 6 "UMask": "0x02", 13 "EventCode": "0x807", 14 "UMask": "0x02", 21 "EventCode": "0x847", 22 "UMask": "0x02", 29 "EventCode": "0x887", 30 "UMask": "0x02", 36 …ion": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channel Controller 0", [all …]
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/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | mediatek,efuse.yaml | 23 pattern: "^efuse@[0-9a-f]+$" 58 reg = <0x11c10000 0x1000>; 63 reg = <0x184 0x1>; 64 bits = <0 5>; 67 reg = <0x184 0x2>; 71 reg = <0x185 0x1>; 75 reg = <0x186 0x1>; 76 bits = <0 5>; 79 reg = <0x186 0x2>; 83 reg = <0x187 0x1>; [all …]
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/linux/drivers/media/pci/tw686x/ |
H A D | tw686x-regs.h | 6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe}) 7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \ 8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \ 9 a0 + 0x38}) 10 #define INT_STATUS 0x00 11 #define PB_STATUS 0x01 12 #define DMA_CMD 0x02 13 #define VIDEO_FIFO_STATUS 0x03 14 #define VIDEO_CHANNEL_ID 0x04 15 #define VIDEO_PARSER_STATUS 0x05 [all …]
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/linux/drivers/gpu/drm/radeon/ |
H A D | ppsmc.h | 28 #define PPSMC_SWSTATE_FLAG_DC 0x01 29 #define PPSMC_SWSTATE_FLAG_UVD 0x02 30 #define PPSMC_SWSTATE_FLAG_VCE 0x04 31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08 33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff 37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04 [all …]
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/linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | ppsmc.h | 28 #define PPSMC_SWSTATE_FLAG_DC 0x01 29 #define PPSMC_SWSTATE_FLAG_UVD 0x02 30 #define PPSMC_SWSTATE_FLAG_VCE 0x04 31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08 33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff 37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04 [all …]
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/linux/Documentation/fault-injection/ |
H A D | nvme-fault-injection.rst | 33 name fault_inject, interval 1, probability 100, space 0, times 1 34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2 39 dump_stack+0x5c/0x7d 40 should_fail+0x148/0x170 41 nvme_should_fail+0x2f/0x50 [nvme_core] 42 nvme_process_cq+0xe7/0x1d0 [nvme] 43 nvme_irq+0x1e/0x40 [nvme] 44 __handle_irq_event_percpu+0x3a/0x190 45 handle_irq_event_percpu+0x30/0x70 46 handle_irq_event+0x36/0x60 [all …]
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/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ |
H A D | other.json | 4 "EventCode": "0x139", 10 "EventCode": "0x180", 16 "EventCode": "0x181", 22 "EventCode": "0x182", 28 "EventCode": "0x183", 34 "EventCode": "0x184", 40 "EventCode": "0x185", 46 "EventCode": "0x186", 52 "EventCode": "0x187", 58 "EventCode": "0x188", [all …]
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/linux/drivers/net/wireless/mediatek/mt76/mt7615/ |
H A D | eeprom.c | 20 val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf); in mt7615_efuse_read() 24 if (!mt76_poll(dev, base + MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000)) in mt7615_efuse_read() 32 memset(data, 0x0, 16); in mt7615_efuse_read() 33 return 0; in mt7615_efuse_read() 36 for (i = 0; i < 4; i++) { in mt7615_efuse_read() 41 return 0; in mt7615_efuse_read() 55 return 0; in mt7615_efuse_init() 63 for (i = 0; i + 16 <= len; i += 16) { in mt7615_efuse_init() 71 return 0; in mt7615_efuse_init() 81 if (ret < 0) in mt7615_eeprom_load() [all …]
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/linux/drivers/leds/rgb/ |
H A D | leds-mt6370-rgb.c | 27 MT6370_LED_ISNK1 = 0, 35 MT6370_LED_PWM_MODE = 0, 42 F_RGB_EN = 0, 64 R_LED123_CURR = 0, 72 P_LED_TR1 = 0, 81 #define MT6370_REG_DEV_INFO 0x100 82 #define MT6370_REG_RGB1_DIM 0x182 83 #define MT6370_REG_RGB2_DIM 0x183 84 #define MT6370_REG_RGB3_DIM 0x184 85 #define MT6370_REG_RGB_EN 0x185 [all …]
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/linux/sound/drivers/opl4/ |
H A D | opl4_synth.c | 41 #define MIDI_CTL_RELEASE_TIME 0x48 42 #define MIDI_CTL_ATTACK_TIME 0x49 43 #define MIDI_CTL_DECAY_TIME 0x4b 44 #define MIDI_CTL_VIBRATO_RATE 0x4c 45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d 46 #define MIDI_CTL_VIBRATO_DELAY 0x4e 52 static const s16 snd_opl4_pitch_map[0x600] = { 53 0x000,0x000,0x001,0x001,0x002,0x002,0x003,0x003, 54 0x004,0x004,0x005,0x005,0x006,0x006,0x006,0x007, 55 0x007,0x008,0x008,0x009,0x009,0x00a,0x00a,0x00b, [all …]
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/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | smu7_ppsmc.h | 30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305) 32 #define PPSMC_SWSTATE_FLAG_DC 0x01 33 #define PPSMC_SWSTATE_FLAG_UVD 0x02 34 #define PPSMC_SWSTATE_FLAG_VCE 0x04 36 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 37 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 38 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff 40 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 41 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 42 #define PPSMC_SYSTEMFLAG_GDDR5 0x04 [all …]
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H A D | tonga_ppsmc.h | 29 #define PPSMC_SWSTATE_FLAG_DC 0x01 30 #define PPSMC_SWSTATE_FLAG_UVD 0x02 31 #define PPSMC_SWSTATE_FLAG_VCE 0x04 32 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08 34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff 38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04 [all …]
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H A D | fiji_ppsmc.h | 30 #define PPSMC_SWSTATE_FLAG_DC 0x01 31 #define PPSMC_SWSTATE_FLAG_UVD 0x02 32 #define PPSMC_SWSTATE_FLAG_VCE 0x04 34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff 38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04 42 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08 [all …]
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/linux/lib/reed_solomon/ |
H A D | test_rslib.c | 47 {2, 0x7, 1, 1, 1, 100000 }, 48 {3, 0xb, 1, 1, 2, 100000 }, 49 {3, 0xb, 1, 1, 3, 100000 }, 50 {3, 0xb, 2, 1, 4, 100000 }, 51 {4, 0x13, 1, 1, 4, 10000 }, 52 {5, 0x25, 1, 1, 6, 1000 }, 53 {6, 0x43, 3, 1, 8, 1000 }, 54 {7, 0x89, 1, 1, 14, 500 }, 55 {8, 0x11d, 1, 1, 30, 100 }, 56 {8, 0x187, 112, 11, 32, 100 }, [all …]
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/linux/drivers/media/usb/gspca/ |
H A D | stk1135.c | 51 if (gspca_dev->usb_err < 0) in reg_r() 52 return 0; in reg_r() 53 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), in reg_r() 54 0x00, in reg_r() 56 0x00, in reg_r() 61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r() 62 index, gspca_dev->usb_buf[0]); in reg_r() 63 if (ret < 0) { in reg_r() 64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r() 66 return 0; in reg_r() [all …]
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/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | ci_smumgr.c | 58 #define MC_CG_ARB_FREQ_F0 0x0a 59 #define MC_CG_ARB_FREQ_F1 0x0b 60 #define MC_CG_ARB_FREQ_F2 0x0c 61 #define MC_CG_ARB_FREQ_F3 0x0d 63 #define SMC_RAM_END 0x40000 69 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0xB0000, 70 …{ 0x2E, 0x00, 0x00, 0x88, 0x00, 0x00, 0x72, 0x60, 0x51, 0xA7, 0x79, 0x6B, 0x90, 0xBD,… 71 …{ 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1, 0x2A1, 0x2A1, 0x2C9, 0x2C9… 75 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0x65062, 76 …{ 0x2E, 0x00, 0x00, 0x88, 0x00, 0x00, 0x72, 0x60, 0x51, 0xA7, 0x79, 0x6B, 0x90, 0xBD,… [all …]
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/linux/include/uapi/linux/ |
H A D | input-event-codes.h | 23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */ 24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */ 25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */ 26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */ 27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ 28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ 29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ 31 #define INPUT_PROP_MAX 0x1f 38 #define EV_SYN 0x00 39 #define EV_KEY 0x0 [all...] |
/linux/include/dt-bindings/input/ |
H A D | linux-event-codes.h | 23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */ 24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */ 25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */ 26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */ 27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ 28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ 29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ 31 #define INPUT_PROP_MAX 0x1f 38 #define EV_SYN 0x00 39 #define EV_KEY 0x0 [all...] |
/linux/drivers/gpu/drm/amd/include/ |
H A D | v11_structs.h | 28 uint32_t shadow_base_lo; // offset: 0 (0x0) 29 uint32_t shadow_base_hi; // offset: 1 (0x1) 30 uint32_t gds_bkup_base_lo; // offset: 2 (0x2) 31 uint32_t gds_bkup_base_hi; // offset: 3 (0x3) 32 uint32_t fw_work_area_base_lo; // offset: 4 (0x4) 33 uint32_t fw_work_area_base_hi; // offset: 5 (0x5) 34 uint32_t shadow_initialized; // offset: 6 (0x6) 35 uint32_t ib_vmid; // offset: 7 (0x7) 36 uint32_t reserved_8; // offset: 8 (0x8) 37 uint32_t reserved_9; // offset: 9 (0x9) [all …]
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H A D | v12_structs.h | 28 uint32_t shadow_base_lo; // offset: 0 (0x0) 29 uint32_t shadow_base_hi; // offset: 1 (0x1) 30 uint32_t reserved_2; // offset: 2 (0x2) 31 uint32_t reserved_3; // offset: 3 (0x3) 32 uint32_t fw_work_area_base_lo; // offset: 4 (0x4) 33 uint32_t fw_work_area_base_hi; // offset: 5 (0x5) 34 uint32_t shadow_initialized; // offset: 6 (0x6) 35 uint32_t ib_vmid; // offset: 7 (0x7) 36 uint32_t reserved_8; // offset: 8 (0x8) 37 uint32_t reserved_9; // offset: 9 (0x9) [all …]
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