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Searched +full:0 +full:x180f (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,q6usb.yaml53 iommus = <&apps_smmu 0x180f 0x0>;
/linux/drivers/net/dsa/microchip/
H A Dksz_common.c38 #define MIB_COUNTER_NUM 0x20
117 { 0x00, "rx" },
118 { 0x01, "rx_hi" },
119 { 0x02, "rx_undersize" },
120 { 0x03, "rx_fragments" },
121 { 0x04, "rx_oversize" },
122 { 0x05, "rx_jabbers" },
123 { 0x06, "rx_symbol_err" },
124 { 0x07, "rx_crc_err" },
125 { 0x08, "rx_align_err" },
[all …]
/linux/drivers/net/phy/
H A Dmicrochip_t1.c14 #define PHY_ID_LAN87XX 0x0007c150
15 #define PHY_ID_LAN937X 0x0007c180
16 #define PHY_ID_LAN887X 0x0007c1f0
19 #define LAN87XX_EXT_REG_CTL (0x14)
20 #define LAN87XX_EXT_REG_CTL_RD_CTL (0x1000)
21 #define LAN87XX_EXT_REG_CTL_WR_CTL (0x0800)
23 #define LAN87XX_REG_ADDR_MASK GENMASK(7, 0)
26 #define LAN87XX_EXT_REG_RD_DATA (0x15)
29 #define LAN87XX_EXT_REG_WR_DATA (0x16)
32 #define LAN87XX_INTERRUPT_SOURCE (0x18)
[all …]
/linux/lib/
H A Dchecksum_kunit.c20 static const u32 random_init_sum = 0x2847aab;
22 0xac, 0xd7, 0x76, 0x69, 0x6e, 0xf2, 0x93, 0x2c, 0x1f, 0xe0, 0xde, 0x86,
23 0x8f, 0x54, 0x33, 0x90, 0x95, 0xbf, 0xff, 0xb9, 0xea, 0x62, 0x6e, 0xb5,
24 0xd3, 0x4f, 0xf5, 0x60, 0x50, 0x5c, 0xc7, 0xfa, 0x6d, 0x1a, 0xc7, 0xf0,
25 0xd2, 0x2c, 0x12, 0x3d, 0x88, 0xe3, 0x14, 0x21, 0xb1, 0x5e, 0x45, 0x31,
26 0xa2, 0x85, 0x36, 0x76, 0xba, 0xd8, 0xad, 0xbb, 0x9e, 0x49, 0x8f, 0xf7,
27 0xce, 0xea, 0xef, 0xca, 0x2c, 0x29, 0xf7, 0x15, 0x5c, 0x1d, 0x4d, 0x09,
28 0x1f, 0xe2, 0x14, 0x31, 0x8c, 0x07, 0x57, 0x23, 0x1f, 0x6f, 0x03, 0xe1,
29 0x93, 0x19, 0x53, 0x03, 0x45, 0x49, 0x9a, 0x3b, 0x8e, 0x0c, 0x12, 0x5d,
30 0x8a, 0xb8, 0x9b, 0x8c, 0x9a, 0x03, 0xe5, 0xa2, 0x43, 0xd2, 0x3b, 0x4e,
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h29 #define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003
30 #define VERDE_GB_ADDR_CONFIG_GOLDEN 0x12010002
31 #define HAINAN_GB_ADDR_CONFIG_GOLDEN 0x02010001
39 #define SI_MAX_BACKENDS_MASK 0xFF
40 #define SI_MAX_BACKENDS_PER_SE_MASK 0x0F
42 #define SI_MAX_SIMDS_MASK 0x0FFF
43 #define SI_MAX_SIMDS_PER_SE_MASK 0x00FF
45 #define SI_MAX_PIPES_MASK 0xFF
46 #define SI_MAX_PIPES_PER_SIMD_MASK 0x3F
47 #define SI_MAX_LDS_NUM 0xFFFF
[all …]
/linux/drivers/net/wireless/ath/wil6210/
H A Dwmi.h27 #define WMI_INVALID_TEMPERATURE (0xFFFFFFFF)
55 #define WMI_QOS_SET_VIF_PRIORITY (0xFF)
63 MID_DEFAULT = 0x00,
64 FIRST_DBG_MID_ID = 0x10,
65 LAST_DBG_MID_ID = 0xFE,
66 MID_BROADCAST = 0xFF,
74 WMI_FW_CAPABILITY_FTM = 0,
115 WMI_CONNECT_CMDID = 0x01,
116 WMI_DISCONNECT_CMDID = 0x03,
117 WMI_DISCONNECT_STA_CMDID = 0x04,
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h26 #define ixATTR00 0x0000
27 #define ixATTR01 0x0001
28 #define ixATTR02 0x0002
29 #define ixATTR03 0x0003
30 #define ixATTR04 0x0004
31 #define ixATTR05 0x0005
32 #define ixATTR06 0x0006
33 #define ixATTR07 0x0007
34 #define ixATTR08 0x0008
35 #define ixATTR09 0x0009
[all …]
H A Ddce_8_0_d.h27 #define mmPIPE0_PG_CONFIG 0x1760
28 #define mmPIPE0_PG_ENABLE 0x1761
29 #define mmPIPE0_PG_STATUS 0x1762
30 #define mmPIPE1_PG_CONFIG 0x1764
31 #define mmPIPE1_PG_ENABLE 0x1765
32 #define mmPIPE1_PG_STATUS 0x1766
33 #define mmPIPE2_PG_CONFIG 0x1768
34 #define mmPIPE2_PG_ENABLE 0x1769
35 #define mmPIPE2_PG_STATUS 0x176a
36 #define mmPIPE3_PG_CONFIG 0x176c
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h24 …SQ_DEBUG_STS_GLOBAL 0x10A9
25 …ne mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0
26 …SQ_DEBUG_STS_GLOBAL2 0x10B0
27 …ne mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0
30 // base address: 0x4980
31 …SDMA0_DEC_START 0x0000
32 …ne mmSDMA0_DEC_START_BASE_IDX 0
33 …SDMA0_PG_CNTL 0x0016
34 …ne mmSDMA0_PG_CNTL_BASE_IDX 0
35 …SDMA0_PG_CTX_LO 0x0017
[all …]
H A Dgc_12_0_0_offset.h29 // base address: 0x4980
30 …SDMA0_DEC_START 0x0000
31 …e regSDMA0_DEC_START_BASE_IDX 0
32 …SDMA0_MCU_MISC_CNTL 0x0001
33 …e regSDMA0_MCU_MISC_CNTL_BASE_IDX 0
34 …SDMA0_UCODE_REV 0x0003
35 …e regSDMA0_UCODE_REV_BASE_IDX 0
36 …SDMA0_GLOBAL_TIMESTAMP_LO 0x0005
37 …e regSDMA0_GLOBAL_TIMESTAMP_LO_BASE_IDX 0
38 …SDMA0_GLOBAL_TIMESTAMP_HI 0x0006
[all …]
H A Dgc_11_0_3_offset.h29 // base address: 0x4980
30 …SDMA0_DEC_START 0x0000
31 …e regSDMA0_DEC_START_BASE_IDX 0
32 …SDMA0_F32_MISC_CNTL 0x000b
33 …e regSDMA0_F32_MISC_CNTL_BASE_IDX 0
34 …SDMA0_GLOBAL_TIMESTAMP_LO 0x000f
35 …e regSDMA0_GLOBAL_TIMESTAMP_LO_BASE_IDX 0
36 …SDMA0_GLOBAL_TIMESTAMP_HI 0x0010
37 …e regSDMA0_GLOBAL_TIMESTAMP_HI_BASE_IDX 0
38 …SDMA0_POWER_CNTL 0x001a
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h27 // base address: 0x1300000
31 // base address: 0x1300000
35 // base address: 0x1300000
39 // base address: 0x1300000
43 // base address: 0x1300000
47 // base address: 0x1300020
51 // base address: 0x1300040
55 // base address: 0x1300060
59 // base address: 0x1300080
63 // base address: 0x13000a0
[all …]