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/linux/Documentation/devicetree/bindings/mmc/
H A Dmarvell,xenon-sdhci.yaml66 minimum: 0
70 Operation Control Register Bit[7:0]. Set/clear the corresponding bit to
91 minimum: 0
92 maximum: 0x1f
93 default: 0xf
100 minimum: 0
101 maximum: 0x1f
102 default: 0xf
111 default: 0x4
133 default: 0x9
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi35 reg = <0 0x4000000 0 0x200000>;
40 reg = <0 0x4400000 0 0x1000000>;
47 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0>;
85 /* 32M internal register @ 0xd000_0000 */
86 ranges = <0x0 0x0 0xd0000000 0x2000000>;
90 reg = <0x8300 0x40>;
98 reg = <0xd000 0x1000>;
104 #size-cells = <0>;
[all …]