Searched +full:0 +full:x17030000 (Results 1 – 7 of 7) sorted by relevance
42 reg = <0x17030000 0x10000>;
23 - port-id: Port number (0 or 1)34 - #size-cells: Must be <0>.43 Valid values are between 0 to 7, that maps to47 Valid values are between 0 to 7, that maps to64 reg = <0x0 0x17020000 0x0 0xd100>,65 <0x0 0x17030000 0x0 0x400>,66 <0x0 0x10000000 0x0 0x200>;68 interrupts = <0x0 0x3c 0x4>;69 port-id = <0>;70 clocks = <&menetclk 0>;[all …]
16 #size-cells = <0>;18 cpu@0 {21 reg = <0x0 0x000>;23 cpu-release-addr = <0x1 0x0000fff8>;29 reg = <0x0 0x001>;31 cpu-release-addr = <0x1 0x0000fff8>;37 reg = <0x0 0x100>;39 cpu-release-addr = <0x1 0x0000fff8>;45 reg = <0x0 0x101>;47 cpu-release-addr = <0x1 0x0000fff8>;[all …]
20 #size-cells = <0>;22 S7_0: cpu@0 {24 reg = <0>;200 cpu_opp: opp-table-0 {260 #clock-cells = <0>;265 #clock-cells = <0>;271 #clock-cells = <0>;277 #clock-cells = <0>;283 #clock-cells = <0>;289 #clock-cells = <0>;[all …]
293 #size-cells = <0>;327 cpu0: cpu@0 {330 reg = <0x000>;353 reg = <0x001>;376 reg = <0x002>;399 reg = <0x003>;422 reg = <0x100>;445 reg = <0x101>;468 reg = <0x102>;491 reg = <0x103>;[all …]
329 #size-cells = <0>;367 cpu0: cpu@0 {370 reg = <0x000>;394 reg = <0x100>;418 reg = <0x200>;442 reg = <0x300>;466 reg = <0x400>;490 reg = <0x500>;514 reg = <0x600>;538 reg = <0x700>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]