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/linux/arch/arm64/boot/dts/exynos/
H A Dexynosautov920.dtsi38 #clock-cells = <0>;
44 #size-cells = <0>;
87 cpu0: cpu@0 {
90 reg = <0x0 0x0>;
92 i-cache-size = <0x10000>;
95 d-cache-size = <0x10000>;
104 reg = <0x0 0x100>;
106 i-cache-size = <0x10000>;
109 d-cache-size = <0x10000>;
118 reg = <0x0 0x200>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8750.dtsi30 #size-cells = <0>;
32 cpu0: cpu@0 {
35 reg = <0x0 0x0>;
51 reg = <0x0 0x100>;
61 reg = <0x0 0x200>;
71 reg = <0x0 0x300>;
81 reg = <0x0 0x400>;
91 reg = <0x0 0x500>;
101 reg = <0x0 0x10000>;
117 reg = <0x0 0x10100>;
[all …]