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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek,vcodec-subdev-decoder.yaml92 '^video-codec@[0-9a-f]+$':
209 ranges = <0 0x16000000 0x16000000 0 0x40000>;
217 ranges = <0 0
[all...]
H A Dmediatek,vcodec-decoder.yaml151 reg = <0x16020000 0x1000>, /*VDEC_MISC*/
152 <0x16021000 0x800>, /*VDEC_LD*/
153 <0x16021800 0x800>, /*VDEC_TOP*/
154 <0x16022000 0x1000>, /*VDEC_CM*/
155 <0x16023000 0x100
[all...]
H A Dmediatek-vcodec.txt38 reg = <0 0x16000000 0 0x100>, /*VDEC_SYS*/
39 <0 0x16020000 0 0x1000>, /*VDEC_MISC*/
40 <0 0x16021000 0 0x800>, /*VDEC_LD*/
41 <0 0x16021800 0 0x800>, /*VDEC_TOP*/
42 <0 0x16022000 0 0x1000>, /*VDEC_CM*/
43 <0 0x16023000 0 0x1000>, /*VDEC_AD*/
44 <0 0x16024000 0 0x1000>, /*VDEC_AV*/
45 <0 0x16025000 0 0x1000>, /*VDEC_PP*/
46 <0 0x16026800 0 0x800>, /*VP8_VD*/
47 <0 0x16027000 0 0x800>, /*VP6_VD*/
[all …]
/freebsd/sys/contrib/device-tree/src/mips/img/
H A Dboston.dts24 #size-cells = <0>;
26 cpu@0 {
29 reg = <0>;
34 memory@0 {
36 reg = <0x00000000 0x10000000>;
42 reg = <0x10000000 0x2000000>;
51 ranges = <0x02000000 0 0x40000000
52 0x40000000 0 0x40000000>;
54 bus-range = <0x00 0xff>;
56 interrupt-map-mask = <0 0 0 7>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/
H A Dmediatek,vdecsys.txt27 reg = <0 0x16000000 0 0x1000>;
H A Dmediatek,mt8195-clock.yaml68 reg = <0x10720000 0x1000>;
75 reg = <0x11d03000 0x1000>;
82 reg = <0x11e05000 0x1000>;
89 reg = <0x13fbf000 0x1000>;
96 reg = <0x14e00000 0x1000>;
103 reg = <0x14e02000 0x1000>;
110 reg = <0x14e03000 0x1000>;
117 reg = <0x15000000 0x1000>;
124 reg = <0x15110000 0x1000>;
131 reg = <0x15130000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,mt6795-clock.yaml51 reg = <0 0x13000000 0 0x1000>;
57 reg = <0 0x16000000 0 0x1000>;
63 reg = <0 0x18000000 0 0x1000>;
H A Dmediatek,mt8195-clock.yaml68 reg = <0x10720000 0x1000>;
75 reg = <0x11d03000 0x1000>;
82 reg = <0x11e05000 0x1000>;
89 reg = <0x13fbf000 0x1000>;
96 reg = <0x14e00000 0x1000>;
103 reg = <0x14e02000 0x1000>;
110 reg = <0x14e03000 0x1000>;
117 reg = <0x15000000 0x1000>;
124 reg = <0x15110000 0x1000>;
131 reg = <0x15130000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dstarfive,jh7110-crypto.yaml87 reg = <0x16000000 0x4000>;
93 <&dma 0 2>;
/freebsd/sys/contrib/device-tree/src/mips/netlogic/
H A Dxlp_gvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x112100 0xa00>;
32 #address-cells = <0>;
34 reg = <0 0x110000 0x200>;
38 nor_flash@1,0 {
43 reg = <1 0 0x1000000>;
45 partition@0 {
47 reg = <0x0 0x100000>; /* 1M */
53 reg = <0x100000 0x100000>; /* 1M */
[all …]
H A Dxlp_rvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x112100 0xa00>;
32 #address-cells = <0>;
34 reg = <0 0x110000 0x200>;
38 nor_flash@1,0 {
43 reg = <1 0 0x1000000>;
45 partition@0 {
47 reg = <0x0 0x100000>; /* 1M */
53 reg = <0x100000 0x100000>; /* 1M */
[all …]
H A Dxlp_evp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x30100 0xa00>;
33 reg = <0 0x31100 0xa00>;
43 #size-cells = <0>;
44 reg = <0 0x32100 0xa00>;
54 #size-cells = <0>;
55 reg = <0 0x33100 0xa00>;
64 reg = <0x68>;
69 reg = <0x4c>;
[all …]
H A Dxlp_fvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x30100 0xa00>;
33 reg = <0 0x31100 0xa00>;
43 #size-cells = <0>;
44 reg = <0 0x37100 0x20>;
54 #size-cells = <0>;
55 reg = <0 0x37120 0x20>;
64 reg = <0x68>;
69 reg = <0x4c>;
[all …]
H A Dxlp_svp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x30100 0xa00>;
33 reg = <0 0x31100 0xa00>;
43 #size-cells = <0>;
44 reg = <0 0x32100 0xa00>;
54 #size-cells = <0>;
55 reg = <0 0x33100 0xa00>;
64 reg = <0x68>;
69 reg = <0x4c>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dingenic,nemc.yaml14 pattern: "^memory-controller@[0-9a-f]+$"
40 ".*@[0-9]+$":
61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x100000
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dingenic,nand.yaml66 reg = <0x13410000 0x10000>;
69 ranges = <1 0 0x1b000000 0x1000000>,
70 <2 0 0x1a000000 0x1000000>,
71 <3 0 0x19000000 0x1000000>,
72 <4 0 0x18000000 0x1000000>,
73 <5 0 0x17000000 0x1000000>,
74 <6 0 0x16000000 0x1000000>;
80 reg = <1 0 0x1000000>;
83 #size-cells = <0>;
94 pinctrl-0 = <&pins_nemc>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dintegrator.dtsi12 reg = <0x0 0x0>;
17 reg = <0x10000000 0x200>;
18 ranges = <0x0 0x10000000 0x200>;
23 led@c,0 {
25 reg = <0x0c 0x04>;
26 offset = <0x0c>;
27 mask = <0x01>;
36 reg = <0x12000000 0x100>;
40 reg = <0x13000000 0x100>;
46 reg = <0x13000100 0x100>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8167.dtsi22 reg = <0 0x10000000 0 0x1000>;
28 reg = <0 0x10001000 0 0x1000>;
34 reg = <0 0x10018000 0 0x710>;
40 reg = <0 0x10006000 0 0x1000>;
45 #size-cells = <0>;
53 #power-domain-cells = <0>;
62 #power-domain-cells = <0>;
69 #power-domain-cells = <0>;
78 #size-cells = <0>;
85 #size-cells = <0>;
[all …]
H A Dmt6779.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
32 reg = <0x000>;
39 reg = <0x100>;
46 reg = <0x200>;
53 reg = <0x300>;
60 reg = <0x400>;
67 reg = <0x500>;
74 reg = <0x600>;
81 reg = <0x700>;
[all …]
H A Dmt6797.dtsi25 #size-cells = <0>;
27 cpu0: cpu@0 {
31 reg = <0x000>;
38 reg = <0x001>;
45 reg = <0x002>;
52 reg = <0x003>;
59 reg = <0x100>;
66 reg = <0x101>;
73 reg = <0x102>;
80 reg = <0x103>;
[all …]
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Dtanf.c23 .poly = { V4 (0x1.55555p-2f), V4 (0x1.11166p-3f), V4 (0x1.b88a78p-5f),
24 V4 (0x1.7b5756p-6f), V4 (0x1.4ef4cep-8f), V4 (0x1.0e1e74p-7f) },
27 = { -0x1.921fb6p+0f, 0x1.777a5cp-25f, 0x1.ee59dap-50f, 0x1.45f306p-1f },
28 .shift = V4 (0x1.8p+23f),
30 .range_val = V4 (0x1p15f),
34 #define RangeVal v_u32 (0x47000000) /* asuint32(0x1p15f). */
35 #define TinyBound v_u32 (0x30000000) /* asuint32 (0x1p-31f). */
36 #define Thresh v_u32 (0x16000000) /* asuint32(RangeVal) - TinyBound. */
51 /* Tiny z (<= 0x1p-31) will underflow when calculating z^4. in eval_poly()
53 sidestep this by fixing such lanes to 0. */ in eval_poly()
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_loongarch64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
65 // jirl ra, t0, 0 ; call the tracing hook in patchSled()
79 uint32_t LoTracingHookAddr = reinterpret_cast<int64_t>(TracingHook) & 0xfff; in patchSled()
81 (reinterpret_cast<int64_t>(TracingHook) >> 12) & 0xfffff; in patchSled()
83 (reinterpret_cast<int64_t>(TracingHook) >> 32) & 0xfffff; in patchSled()
85 (reinterpret_cast<int64_t>(TracingHook) >> 52) & 0xfff; in patchSled()
86 uint32_t LoFunctionID = FuncId & 0xfff; in patchSled()
87 uint32_t HiFunctionID = (FuncId >> 12) & 0xfffff; in patchSled()
88 Address[1] = encodeInstruction2RIx(0x29c00000, RegNum::RN_RA, RegNum::RN_SP, in patchSled()
89 0x8); // st.d ra, sp, 8 in patchSled()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx1.dtsi38 reg = <0x00223000 0x1000>;
42 #size-cells = <0>;
45 cpu@0 {
47 reg = <0>;
59 #clock-cells = <0>;
75 reg = <0x00200000 0x10000>;
80 reg = <0x00202000 0x1000>;
89 reg = <0x00203000 0x1000>;
98 reg = <0x00205000 0x1000>;
109 reg = <0x00206000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8960.dtsi20 #size-cells = <0>;
21 interrupts = <GIC_PPI 14 0x304>;
23 cpu@0 {
27 reg = <0>;
52 reg = <0x80000000 0>;
57 interrupts = <GIC_PPI 10 0x304>;
64 #clock-cells = <0>;
71 #clock-cells = <0>;
78 #clock-cells = <0>;
103 reg = <0x02000000 0x1000>,
[all …]
H A Dqcom-msm8660.dtsi18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0>;
45 reg = <0x0 0x0>;
56 #clock-cells = <0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
86 reg = < 0x02080000 0x1000 >,
87 < 0x02081000 0x1000 >;
92 interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
[all …]

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