Searched +full:0 +full:x15820000 (Results 1 – 9 of 9) sorted by relevance
47 reg = <0x15820000 0x10000>;
56 reg = <0x10720000 0x1000>;63 reg = <0x11007000 0x1000>;70 reg = <0x11cb1000 0x1000>;77 reg = <0x11d03000 0x1000>;84 reg = <0x11d23000 0x1000>;91 reg = <0x11e01000 0x1000>;98 reg = <0x11f02000 0x1000>;105 reg = <0x11f10000 0x1000>;112 reg = <0x13fbf000 0x1000>;119 reg = <0x15020000 0x1000>;[all …]
12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */13 #define RZV2N_P0 036 #clock-cells = <0>;38 clock-frequency = <0>;48 cluster0_opp: opp-table-0 {76 #size-cells = <0>;78 cpu0: cpu@0 {80 reg = <0>;90 reg = <0x100>;100 reg = <0x200>;[all …]
18 #clock-cells = <0>;20 clock-frequency = <0>;30 cluster0_opp: opp-table-0 {58 #size-cells = <0>;60 cpu0: cpu@0 {62 reg = <0>;72 reg = <0x100>;82 reg = <0x200>;92 reg = <0x300>;100 L3_CA55: cache-controller-0 {[all …]
36 #clock-cells = <0>;45 #clock-cells = <0>;52 #clock-cells = <0>;59 #size-cells = <0>;61 cpu0: cpu@0 {64 reg = <0x000>;75 performance-domains = <&performance 0>;83 reg = <0x100>;94 performance-domains = <&performance 0>;102 reg = <0x200>;[all …]
35 reg = <0 0x1000ce00 0 0x200>;336 #size-cells = <0>;374 cpu0: cpu@0 {377 reg = <0x000>;401 reg = <0x100>;425 reg = <0x200>;449 reg = <0x300>;473 reg = <0x400>;497 reg = <0x500>;521 reg = <0x600>;[all …]
31 bus@0 {36 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;40 reg = <0x0 0x00100000 0x0 0xf000>,41 <0x0 0x0010f000 0x0 0x1000>;47 reg = <0x0 0x02080000 0x0 0x00121000>;48 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,70 reg = <0x0 0x02200000 0x0 0x10000>,71 <0x0 0x02210000 0x0 0x10000>;124 gpio-ranges = <&pinmux 0 0 164>;129 reg = <0x0 0x2430000 0x0 0x19100>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]