Searched +full:0 +full:x1570000 (Results 1 – 7 of 7) sorted by relevance
16 - #address-cells: Must be 0.23 - interrupt-map-mask: Must be <0xffffffff 0>.28 reg = <0x0 0x1570000 0x0 0x10000>;32 ranges = <0x0 0x0 0x1570000 0x10000>;37 #address-cells = <0>;39 reg = <0x1ac 4>;41 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,42 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,43 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,44 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,[all …]
18 reg = <0x0 0x1570000 0x0 0x10000>;
57 reg = <0x1570000 0x10000>;
38 #size-cells = <0>;40 cpu0: cpu@0 {43 reg = <0x0>;44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;53 reg = <0x1>;54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;63 reg = <0x2>;64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;73 reg = <0x3>;74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;[all...]
37 #size-cells = <0>;45 cpu0: cpu@0 {48 reg = <0x0>;49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;58 reg = <0x1>;59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;68 reg = <0x2>;69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;78 reg = <0x3>;79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;[all...]
32 #size-cells = <0>;34 cpu0: cpu@0 {37 reg = <0x0>;38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;54 arm,psci-suspend-param = <0x0>;63 #clock-cells = <0>;70 #clock-cells = <0>;85 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;92 reg = <0x0 0x140100[all...]
31 #size-cells = <0>;36 reg = <0xf00>;37 clocks = <&clockgen 1 0>;44 reg = <0xf01>;45 clocks = <&clockgen 1 0>;50 memory@0 {52 reg = <0x0 0x0 0x0 0x[all...]