Searched +full:0 +full:x1570000 (Results 1 – 7 of 7) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | fsl,ls-extirq.txt | 16 - #address-cells: Must be 0. 23 - interrupt-map-mask: Must be <0xffffffff 0>. 28 reg = <0x0 0x1570000 0x0 0x10000>; 32 ranges = <0x0 0x0 0x1570000 0x10000>; 37 #address-cells = <0>; 39 reg = <0x1ac 4>; 41 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, 42 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, 43 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, 44 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/freescale/ |
| H A D | fsl,layerscape-scfg.txt | 18 reg = <0x0 0x1570000 0x0 0x10000>;
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| /freebsd/sys/contrib/device-tree/Bindings/soc/fsl/ |
| H A D | fsl,layerscape-scfg.yaml | 59 reg = <0x1570000 0x10000>;
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls1043a.dtsi | 37 #size-cells = <0>; 45 cpu0: cpu@0 { 48 reg = <0x0>; 49 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 58 reg = <0x1>; 59 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 68 reg = <0x2>; 69 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 78 reg = <0x3>; 79 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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| H A D | fsl-ls1046a.dtsi | 38 #size-cells = <0>; 40 cpu0: cpu@0 { 43 reg = <0x0>; 44 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 53 reg = <0x1>; 54 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 63 reg = <0x2>; 64 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 73 reg = <0x3>; 74 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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| H A D | fsl-ls1012a.dtsi | 32 #size-cells = <0>; 34 cpu0: cpu@0 { 37 reg = <0x0>; 38 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 54 arm,psci-suspend-param = <0x0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */ 93 <0x0 0x1402000 0 0x2000>, /* GICC */ 94 <0x0 0x1404000 0 0x2000>, /* GICH */ [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/ls/ |
| H A D | ls1021a.dtsi | 31 #size-cells = <0>; 36 reg = <0xf00>; 37 clocks = <&clockgen 1 0>; 44 reg = <0xf01>; 45 clocks = <&clockgen 1 0>; 50 memory@0 { 52 reg = <0x0 0x0 0x0 0x0>; 57 #clock-cells = <0>; 80 offset = <0xb0>; 81 mask = <0x02>; [all …]
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