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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml15 pattern: "^display-hub@[0-9a-f]+$"
45 - description: window group 0 reset
69 "^display@[0-9a-f]+$":
127 reg = <0x15200000 0x00040000>;
147 ranges = <0x15200000 0x15200000 0x40000>;
151 reg = <0x15200000 0x10000>;
165 nvidia,head = <0>;
170 reg = <0x15210000 0x10000>;
189 reg = <0x15220000 0x10000>;
216 reg = <0x15200000 0x00040000>;
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x2200000 0x0 0x10000>,
28 <0x0 0x2210000 0x0 0x10000>;
44 reg = <0x0 0x02490000 0x0 0x10000>;
71 snps,burst-map = <0x7>;
78 reg = <0x0 0x2600000 0x0 0x210000>;
116 dma-channel-mask = <0xfffffffe>;
129 ranges = <0x02900000 0x0 0x02900000 0x200000>;
134 reg = <0x02900800 0x800>;
[all …]
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x0 0xf000>,
30 <0x0 0x0010f000 0x0 0x1000>;
36 reg = <0x0 0x2200000 0x0 0x10000>,
37 <0x0 0x2210000 0x0 0x10000>;
90 gpio-ranges = <&pinmux 0 0 169>;
95 reg = <0x0 0x02300000 0x0 0x1000>;
105 reg = <0x0 0x2390000 0x0 0x1000>,
106 <0x0 0x23a0000 0x0 0x1000>,
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
96 i-cache-size = <0x8000>;
99 d-cache-size = <0x8000>;
109 reg = <0x101>;
112 i-cache-size = <0x8000>;
115 d-cache-size = <0x8000>;
125 reg = <0x102>;
128 i-cache-size = <0x8000>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi29 #clock-cells = <0>;
34 #clock-cells = <0>;
40 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0x0 0x0>;
47 qcom,freq-domain = <&cpufreq_hw 0>;
67 reg = <0x0 0x100>;
69 qcom,freq-domain = <&cpufreq_hw 0>;
84 reg = <0x0 0x200>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]