Searched +full:0 +full:x15010000 (Results 1 – 7 of 7) sorted by relevance
82 reg = <0 0x1020a000 0 0x1000>;96 reg = <0 0x15010000 0 0x1000>;
30 #define CODEC_SIZE 0x100031 #define JPEG_SIZE 0x100032 #define SEQ_SIZE 0x100033 #define GOP_SIZE 0x100034 #define PIC_SIZE 0x100035 #define QMETER_SIZE 0x100036 #define DBGLOG_SIZE 0x1000037 #define DEBUG_SIZE 0x8000038 #define ENG_SIZE 0x100039 #define MALONE_SKIPPED_FRAME_ID 0x555[all …]
21 #size-cells = <0>;22 cpu0: cpu@0 {24 reg = <0x0>;32 reg = <0x1>;40 reg = <0x2>;48 reg = <0x3>;58 #clock-cells = <0>;73 reg = <0 0x43000000 0 0x30000>;79 reg = <0 0x4fc00000 0 0x00100000>;83 reg = <0 0x4fd00000 0 0x40000>;[all …]
22 cluster0_opp: opp-table-0 {66 #size-cells = <0>;85 cpu0: cpu@0 {88 reg = <0x000>;100 reg = <0x001>;113 reg = <0x200>;126 CPU_SLEEP_0: cpu-sleep-0 {132 arm,psci-suspend-param = <0x0010000>;135 CLUSTER_SLEEP_0: cluster-sleep-0 {141 arm,psci-suspend-param = <0x1010000>;[all …]
39 #size-cells = <0>;88 /* Cluster 0 */89 cpucl0_0: cpu@0 {92 reg = <0x0 0x000>;96 i-cache-size = <0xc000>;99 d-cache-size = <0x8000>;108 reg = <0x0 0x001>;112 i-cache-size = <0xc000>;115 d-cache-size = <0x8000>;124 reg = <0x0 0x002>;[all …]
23 /* Register Offset definitions for CMU_CMU (0x11c10000) */24 #define PLL_LOCKTIME_PLL_SHARED0 0x025 #define PLL_LOCKTIME_PLL_SHARED1 0x426 #define PLL_LOCKTIME_PLL_SHARED2 0x827 #define PLL_LOCKTIME_PLL_SHARED3 0xc28 #define PLL_CON0_PLL_SHARED0 0x10029 #define PLL_CON0_PLL_SHARED1 0x12030 #define PLL_CON0_PLL_SHARED2 0x14031 #define PLL_CON0_PLL_SHARED3 0x16032 #define MUX_CMU_CIS0_CLKMUX 0x1000[all …]
48 #clock-cells = <0>;53 #size-cells = <0>;91 reg = <0x100>;96 i-cache-size = <0x8000>;99 d-cache-size = <0x8000>;109 reg = <0x101>;112 i-cache-size = <0x8000>;115 d-cache-size = <0x8000>;125 reg = <0x102>;128 i-cache-size = <0x8000>;[all …]