| /linux/lib/crypto/arm/ |
| H A D | chacha-scalar-core.S | 24 * similarly for row 'd'. (brot, drot) start out as (0, 0) but we make it such 42 X15 .req r14 110 __strd X8_X10, X9_X11, sp, 0 113 // quarterrounds: (x2, x6, x10, x14) and (x3, x7, x11, x15) 114 _halfround X2, X6, X8_X10, X14, X3, X7, X9_X11, X15 121 // quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12) 122 _halfround X0, X5, X8_X10, X15, X1, X6, X9_X11, X12 126 __ldrd X8_X10, X9_X11, sp, 0 133 .set brot, 0 [all...] |
| /linux/drivers/gpu/drm/radeon/ |
| H A D | rv770_smc.c | 34 #define FIRST_SMC_INT_VECT_REG 0xFFD8 35 #define FIRST_INT_VECT_S19 0xFFC0 38 0x08, 0x10, 0x08, 0x10, 39 0x08, 0x10, 0x08, 0x10, 40 0x08, 0x10, 0x08, 0x10, 41 0x08, 0x10, 0x08, 0x10, 42 0x08, 0x10, 0x08, 0x10, 43 0x08, 0x10, 0x08, 0x10, 44 0x08, 0x10, 0x08, 0x10, 45 0x08, 0x10, 0x08, 0x10, [all …]
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| /linux/net/core/ |
| H A D | ptp_classifier.c | 12 * jneq #0x800, test_ipv6 ; ETH_P_IP ? 16 * jset #0x1fff, drop_ipv4 ; don't allow fragments 17 * ldxb 4*([14]&0xf) ; load IP header len 21 * and #0xf ; mask PTP_CLASS_VMASK 22 * or #0x10 ; PTP_CLASS_IPV4 24 * drop_ipv4: ret #0x0 ; PTP_CLASS_NONE 28 * jneq #0x86dd, test_8021q ; ETH_P_IPV6 ? 34 * and #0xf ; mask PTP_CLASS_VMASK 35 * or #0x20 ; PTP_CLASS_IPV6 37 * drop_ipv6: ret #0x [all...] |
| /linux/drivers/video/fbdev/sis/ |
| H A D | init.h | 70 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f}; 71 static const unsigned short ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53}; 72 static const unsigned short ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */ 73 static const unsigned short ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54}; 74 static const unsigned short ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c}; 75 static const unsigned short ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e}; 76 static const unsigned short ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62}; 77 static const unsigned short ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35}; 78 static const unsigned short ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36}; 79 static const unsigned short ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61}; [all …]
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| /linux/sound/drivers/opl4/ |
| H A D | yrw801.c | 40 snd_opl4_read_memory(opl4, buf, 0x001200, 15); in snd_yrw801_detect() 43 snd_opl4_read_memory(opl4, buf, 0x1ffffe, 2); in snd_yrw801_detect() 44 if (buf[0] != 0x01) in snd_yrw801_detect() 46 dev_dbg(opl4->card->dev, "YRW801 ROM version %02x.%02x\n", buf[0], buf[1]); in snd_yrw801_detect() 47 return 0; in snd_yrw801_detect() 58 {0x14, 0x27, {0x12c,7474,100, 0,0,0x00,0xc8,0x20,0xf2,0x13,0x08,0x0}}, 59 {0x28, 0x2d, {0x12d,6816,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}}, 60 {0x2e, 0x33, {0x12e,5899,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}}, 61 {0x34, 0x39, {0x12f,5290,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}}, 62 {0x3a, 0x3f, {0x130,4260,100, 0,0,0x0a,0xc8,0x20,0xf2,0x14,0x08,0x0}}, [all …]
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| /linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| H A D | mmhub_3_0_0_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_3_0_2_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_4_1_0_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_3_3_0_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_1_8_0_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_3_0_1_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_9_3_0_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0 28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 29 …RDCLI0__URG_HIGH__SHIFT 0x4 30 …RDCLI0__URG_LOW__SHIFT 0x8 31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 32 …RDCLI0__MAX_BW__SHIFT 0xd 33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 34 …DCLI0__MIN_BW__SHIFT 0x16 35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 36 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_2_0_0_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0 28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 29 …RDCLI0__URG_HIGH__SHIFT 0x4 30 …RDCLI0__URG_LOW__SHIFT 0x8 31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 32 …RDCLI0__MAX_BW__SHIFT 0xd 33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 34 …DCLI0__MIN_BW__SHIFT 0x16 35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 36 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_1_0_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0 28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 29 …RDCLI0__URG_HIGH__SHIFT 0x4 30 …RDCLI0__URG_LOW__SHIFT 0x8 31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 32 …RDCLI0__MAX_BW__SHIFT 0xd 33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 34 …DCLI0__MIN_BW__SHIFT 0x16 35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 36 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_9_1_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0 28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 29 …RDCLI0__URG_HIGH__SHIFT 0x4 30 …RDCLI0__URG_LOW__SHIFT 0x8 31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 32 …RDCLI0__MAX_BW__SHIFT 0xd 33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 34 …DCLI0__MIN_BW__SHIFT 0x16 35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 36 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| H A D | mmhub_1_7_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0 30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3 31 …RDCLI0__URG_HIGH__SHIFT 0x4 32 …RDCLI0__URG_LOW__SHIFT 0x8 33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc 34 …RDCLI0__MAX_BW__SHIFT 0xd 35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15 36 …DCLI0__MIN_BW__SHIFT 0x16 37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19 38 …DCLI0__MAX_OSD__SHIFT 0x1a [all …]
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| /linux/drivers/hid/amd-sfh-hid/hid_descriptor/ |
| H A D | amd_sfh_hid_report_desc.h | 15 0x05, 0x20, /* Usage page */ 16 0x09, 0x73, /* Motion type Accel 3D */ 17 0xA1, 0x00, /* HID Collection (Physical) */ 20 0x85, 1, /* HID Report ID */ 21 0x05, 0x20, /* HID usage page sensor */ 22 0x0 [all...] |
| /linux/drivers/video/fbdev/ |
| H A D | platinumfb.h | 54 * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5)) 55 * Newer ones use the values in clocksel[0], for which the formula 57 * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5)) 69 #define DIV2 0x20 70 #define DIV4 0x40 71 #define DIV8 0x60 72 #define DIV16 0x80 76 0x5c00, 78 { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, 79 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d, [all …]
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| /linux/drivers/hid/bpf/progs/ |
| H A D | Microsoft__Xbox-Elite-2.bpf.c | 10 #define VID_MICROSOFT 0x045e 11 #define PID_XBOX_ELITE_2 0x0b22 30 * - We need to change the usage to be buttons from 0x15 to 0x18 37 0x0a, 0x99, 0x00, // Usage (Media Select Security) 211 38 0x15, 0x00, // Logical Minimum (0) 214 39 0x26, 0xff, 0x00, // Logical Maximum (255) 216 40 0x95, 0x01, // Report Count (1) 219 41 0x75, 0x04, // Report Size (4) 221 42 0x81, 0x02, // Input (Data,Var,Abs) 223 43 0x15, 0x00, // Logical Minimum (0) 225 [all …]
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| H A D | FR-TEC__Raptor-Mach-2.bpf.c | 10 #define VID_BETOP_2185PC 0x11C0 11 #define PID_RAPTOR_MACH_2 0x5606 21 * 0x05, 0x01, // Usage Page (Generic Desktop) 0 22 * 0x09, 0x04, // Usage (Joystick) 2 23 * 0xa1, 0x01, // Collection (Application) 4 24 * 0x05, 0x01, // Usage Page (Generic Desktop) 6 25 * 0x85, 0x01, // Report ID (1) 8 26 * 0x05, 0x01, // Usage Page (Generic Desktop) 10 27 * 0x09, 0x30, // Usage (X) 12 28 * 0x75, 0x10, // Report Size (16) 14 [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | pm6150.dtsi | 22 hysteresis = <0>; 28 hysteresis = <0>; 37 pm6150_lsid0: pmic@0 { 39 reg = <0x0 SPMI_USID>; 41 #size-cells = <0>; 45 reg = <0x800>; 46 mode-bootloader = <0x2>; 47 mode-recovery = <0x1>; 51 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; 59 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; [all …]
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| /linux/drivers/usb/misc/sisusbvga/ |
| H A D | sisusb_tables.h | 58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 59 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 60 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 61 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 63 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 64 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 65 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F 69 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15, 70 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15, [all …]
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| /linux/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | tvmodesnv17.c | 53 0x2a, 0x9, 0x8a, 0xcb, 0x0, 0x0, 0xb, 0x18, 54 0x7e, 0x40, 0x8a, 0x35, 0x27, 0x0, 0x34, 0x3, 55 0x3e, 0x3, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x9c, 56 0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x3, 57 0xd3, 0x4, 0xd4, 0x1, 0x2, 0x0, 0xa, 0x5, 58 0x0, 0x1a, 0xff, 0x3, 0x18, 0xf, 0x78, 0x0, 59 0x0, 0xb4, 0x0, 0x15, 0x49, 0x10, 0x0, 0x9b, 60 0xbd, 0x15, 0x5, 0x15, 0x3e, 0x3, 0x0, 0x0 65 0x21, 0xe6, 0xef, 0xe3, 0x0, 0x0, 0xb, 0x18, 66 0x7e, 0x44, 0x76, 0x32, 0x25, 0x0, 0x3c, 0x0, [all …]
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| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-motorola-mot.c | 40 gpiod_set_value_cansleep(priv->reset_gpio, 0); in mot_panel_reset() 46 mipi_dsi_generic_write_seq_multi(ctx, 0x55, 0x01); in mot_es2() 51 mipi_dsi_generic_write_seq_multi(ctx, 0xf4, 0x00, 0xbb, 0x46, 0x53, 0x0c, 0x49, in mot_es2() 52 0x74, 0x29, 0x12, 0x15, 0x2f, 0x2f, 0x04); in mot_es2() 53 mipi_dsi_generic_write_seq_multi(ctx, 0xf8, 0x4b, 0x04, 0x10, 0x1a, 0x2c, 0x2c, in mot_es2() 54 0x2c, 0x2c, 0x14, 0x12); in mot_es2() 56 mipi_dsi_generic_write_seq_multi(ctx, 0xb5, 0x03, 0x7f, 0x00, 0x80, 0xc7, 0x00); in mot_es2() 57 mipi_dsi_generic_write_seq_multi(ctx, 0xb7, 0x66, 0xf6, 0x46, 0x9f, 0x90, 0x99, in mot_es2() 58 0xff, 0x80, 0x6d, 0x01); in mot_es2() 61 mipi_dsi_generic_write_seq_multi(ctx, 0xf9, 0x04); in mot_es2() [all …]
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| /linux/arch/x86/boot/ |
| H A D | apm.c | 25 ireg.ah = 0x53; in query_apm_bios() 26 intcall(0x15, &ireg, &oreg); in query_apm_bios() 31 if (oreg.bx != 0x504d) /* "PM" signature */ in query_apm_bios() 34 if (!(oreg.cx & 0x02)) /* 32 bits supported? */ in query_apm_bios() 38 ireg.al = 0x04; in query_apm_bios() 39 intcall(0x15, &ireg, NULL); in query_apm_bios() 42 ireg.al = 0x03; in query_apm_bios() 43 intcall(0x15, &ireg, &oreg); in query_apm_bios() 59 ireg.al = 0x00; in query_apm_bios() 60 intcall(0x15, &ireg, &oreg); in query_apm_bios() [all …]
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