Searched +full:0 +full:x14e00000 (Results 1 – 5 of 5) sorted by relevance
68 reg = <0x10720000 0x1000>;75 reg = <0x11d03000 0x1000>;82 reg = <0x11e05000 0x1000>;89 reg = <0x13fbf000 0x1000>;96 reg = <0x14e00000 0x1000>;103 reg = <0x14e02000 0x1000>;110 reg = <0x14e03000 0x1000>;117 reg = <0x15000000 0x1000>;124 reg = <0x15110000 0x1000>;131 reg = <0x15130000 0x1000>;[all …]
16 #size-cells = <0>;20 cpu@0 {23 reg = <0>;62 reg = <0x0c000000 0x600000>;63 ranges = <0x0 0x0c000000 0x600000>;68 reg = <0x5f0000 0x8000>;78 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */79 0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */80 0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */81 0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */[all …]
44 #clock-cells = <0>;49 #size-cells = <0>;51 cpu_atlas0: cpu@0 {54 reg = <0x0>;56 i-cache-size = <0xc000>;59 d-cache-size = <0x8000>;68 reg = <0x1>;70 i-cache-size = <0xc000>;73 d-cache-size = <0x8000>;82 reg = <0x[all...]
51 #size-cells = <0>;53 cpu0: cpu@0 {56 reg = <0x000>;58 performance-domains = <&performance 0>;75 reg = <0x100>;77 performance-domains = <&performance 0>;94 reg = <0x200>;96 performance-domains = <&performance 0>;113 reg = <0x300>;115 performance-domains = <&performance 0>;[all...]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]