Searched +full:0 +full:x13420000 (Results 1 – 6 of 6) sorted by relevance
62 - Channel: If set to 0xffffffff, any available channel will be allocated72 requested by a client. The primary use for this is channels 0 and89 reg = <0x13420000 0x400>, <0x13421000 0x40>;98 ingenic,reserved-channels = <0x3>;
12 #size-cells = <0>;14 cpu0: cpu@0 {16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";17 reg = <0>;25 #address-cells = <0>;33 reg = <0x10001000 0x40>;44 #clock-cells = <0>;49 #clock-cells = <0>;55 reg = <0x1000000[all...]
13 #size-cells = <0>;15 cpu0: cpu@0 {17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";18 reg = <0>;26 #address-cells = <0>;34 reg = <0x10001000 0x50>;45 #clock-cells = <0>;50 #clock-cells = <0>;56 reg = <0x10000000 0x100>;59 ranges = <0x0 0x10000000 0x100>;[all …]
13 #size-cells = <0>;15 cpu0: cpu@0 {17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";18 reg = <0>;26 #address-cells = <0>;34 reg = <0x10001000 0x50>;45 #clock-cells = <0>;50 #clock-cells = <0>;56 reg = <0x10000000 0x100>;59 ranges = <0x0 0x10000000 0x100>;[all …]
13 #size-cells = <0>;15 cpu0: cpu@0 {17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";18 reg = <0>;26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";35 #address-cells = <0>;43 reg = <0x10001000 0x50>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x10000000 0x100>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]