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/linux/arch/arm/boot/dts/qcom/
H A Dpm8058.dtsi9 #size-cells = <0>;
13 reg = <0x1c>;
22 reg = <0x48>;
28 reg = <0x4a>;
34 reg = <0x50>;
37 gpio-ranges = <&pm8058_mpps 0 0 12>;
44 reg = <0x131>;
50 reg = <0x132>;
56 reg = <0x133>;
62 reg = <0x148>;
[all …]
/linux/sound/soc/codecs/
H A Dtas2764-quirks.h10 #define ENABLED_APPLE_QUIRKS 0x3f
15 #define TAS2764_NOISE_GATE_DISABLE BIT(0)
18 REG_SEQ0(TAS2764_REG(0x0, 0x35), 0xb0)
27 REG_SEQ0(TAS2764_REG(0x0, 0x6b), 0x41)
36 REG_SEQ0(TAS2764_REG(0x0, 0x76), 0x0)
40 * Unknown 0x133/0x137 writes (maybe TDM related)
45 REG_SEQ0(TAS2764_REG(0x1, 0x33), 0x80),
46 REG_SEQ0(TAS2764_REG(0x1, 0x37), 0x3a),
50 * Unknown 0x614 - 0x61f writes
55 REG_SEQ0(TAS2764_REG(0x6, 0x14), 0x0),
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_devtbl.h2 #define QLA_MODEL_NAMES 0x5C
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml43 '^opp-?[0-9]+$':
58 0: MSM8996, speedbin 0
65 0-3: unused
66 4: MSM8996SG, speedbin 0
72 0: IPQ8062
84 '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': true
97 '^opp-?[0-9]+$':
113 #size-cells = <0>;
115 CPU0: cpu@0 {
118 reg = <0x0 0x0>;
[all …]
/linux/include/linux/mfd/da9062/
H A Dregisters.h9 #define DA9062_PMIC_DEVICE_ID 0x62
10 #define DA9062_PMIC_VARIANT_MRC_AA 0x01
11 #define DA9062_PMIC_VARIANT_VRC_DA9061 0x01
12 #define DA9062_PMIC_VARIANT_VRC_DA9062 0x02
20 #define DA9062AA_PAGE_CON 0x000
21 #define DA9062AA_STATUS_A 0x001
22 #define DA9062AA_STATUS_B 0x002
23 #define DA9062AA_STATUS_D 0x004
24 #define DA9062AA_FAULT_LOG 0x005
25 #define DA9062AA_EVENT_A 0x006
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2057.h9 #define R2057_DACBUF_VINCM_CORE0 0x000
10 #define R2057_IDCODE 0x001
11 #define R2057_RCCAL_MASTER 0x002
12 #define R2057_RCCAL_CAP_SIZE 0x003
13 #define R2057_RCAL_CONFIG 0x004
14 #define R2057_GPAIO_CONFIG 0x005
15 #define R2057_GPAIO_SEL1 0x006
16 #define R2057_GPAIO_SEL0 0x007
17 #define R2057_CLPO_CONFIG 0x008
18 #define R2057_BANDGAP_CONFIG 0x009
[all …]
H A Dlo.c92 b43_phy_write(dev, B43_PHY_PGACTL, 0xE300); in lo_measure_feedthrough()
101 b43_phy_write(dev, B43_PHY_PGACTL, 0xF300); in lo_measure_feedthrough()
135 v = 0x30; in lo_txctl_register_table()
137 reg = 0x43; in lo_txctl_register_table()
138 padmix = 0; in lo_txctl_register_table()
140 reg = 0x52; in lo_txctl_register_table()
145 reg = 0x43; in lo_txctl_register_table()
146 v = 0x10; in lo_txctl_register_table()
149 reg = 0x52; in lo_txctl_register_table()
150 v = 0x30; in lo_txctl_register_table()
[all …]
/linux/arch/sparc/kernel/
H A Dttable_64.S17 tl0_resv000: BOOT_KERNEL BTRAP(0x1) BTRAP(0x2) BTRAP(0x3)
18 tl0_resv004: BTRAP(0x4) BTRAP(0x5) BTRAP(0x6) BTRAP(0x7)
24 tl0_resv00b: BTRAP(0xb) BTRAP(0xc) BTRAP(0xd) BTRAP(0xe) BTRAP(0xf)
28 tl0_resv012: BTRAP(0x12) BTRAP(0x13) BTRAP(0x14) BTRAP(0x15) BTRAP(0x16) BTRAP(0x17)
29 tl0_resv018: BTRAP(0x18) BTRAP(0x19)
31 tl0_resv01b: BTRAP(0x1b)
32 tl0_resv01c: BTRAP(0x1c) BTRAP(0x1d) BTRAP(0x1e) BTRAP(0x1f)
39 tl0_resv029: BTRAP(0x29) BTRAP(0x2a) BTRAP(0x2b) BTRAP(0x2c) BTRAP(0x2d) BTRAP(0x2e)
40 tl0_resv02f: BTRAP(0x2f)
45 tl0_resv033: BTRAP(0x33)
[all …]
/linux/arch/x86/math-emu/
H A Dget_address.c30 #define FPU_WRITE_BIT 0x10
71 /* Decode the SIB byte. This function assumes mod != 0 */
86 if ((mod == 0) && (base == 5)) in sib()
87 offset = 0; /* No base register */ in sib()
109 } else if (mod == 2 || base == 5) { /* The second condition also has mod==0 */ in sib()
128 EXCEPTION(EX_INTERNAL | 0x130); in vm86_segment()
146 /* segment is unsigned, so this also detects if segment was 0: */ in pm_address()
148 EXCEPTION(EX_INTERNAL | 0x132); in pm_address()
169 limit = 0xffffffff; in pm_address()
173 seg_top = 0xffffffff; in pm_address()
[all …]
H A Derrors.c37 #if 0
49 if ((byte1 & 0xf8) == 0xd8)
58 printk("%02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8,
71 #endif /* 0 */
96 for (i = 0; i < MAX_PRINTED_BYTES; i++) { in FPU_printall()
98 if ((byte1 & 0xf8) == 0xd8) { in FPU_printall()
112 FPU_modrm & 0xf8, FPU_modrm & 7); in FPU_printall()
134 printk("SW: condition bit 0\n"); in FPU_printall()
153 … b=%d st=%d es=%d sf=%d cc=%d%d%d%d ef=%d%d%d%d%d%d\n", partial_status & 0x8000 ? 1 : 0, /* busy */ in FPU_printall()
154 (partial_status & 0x3800) >> 11, /* stack top pointer */ in FPU_printall()
[all …]
/linux/sound/drivers/opl4/
H A Dyrw801.c40 snd_opl4_read_memory(opl4, buf, 0x001200, 15); in snd_yrw801_detect()
43 snd_opl4_read_memory(opl4, buf, 0x1ffffe, 2); in snd_yrw801_detect()
44 if (buf[0] != 0x01) in snd_yrw801_detect()
46 dev_dbg(opl4->card->dev, "YRW801 ROM version %02x.%02x\n", buf[0], buf[1]); in snd_yrw801_detect()
47 return 0; in snd_yrw801_detect()
58 {0x14, 0x27, {0x12c,7474,100, 0,0,0x00,0xc8,0x20,0xf2,0x13,0x08,0x0}},
59 {0x28, 0x2d, {0x12d,6816,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
60 {0x2e, 0x33, {0x12e,5899,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
61 {0x34, 0x39, {0x12f,5290,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
62 {0x3a, 0x3f, {0x130,4260,100, 0,0,0x0a,0xc8,0x20,0xf2,0x14,0x08,0x0}},
[all …]
H A Dopl4_synth.c41 #define MIDI_CTL_RELEASE_TIME 0x48
42 #define MIDI_CTL_ATTACK_TIME 0x49
43 #define MIDI_CTL_DECAY_TIME 0x4b
44 #define MIDI_CTL_VIBRATO_RATE 0x4c
45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d
46 #define MIDI_CTL_VIBRATO_DELAY 0x4e
52 static const s16 snd_opl4_pitch_map[0x600] = {
53 0x000,0x000,0x00
[all...]
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7_ppsmc.h30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305)
32 #define PPSMC_SWSTATE_FLAG_DC 0x01
33 #define PPSMC_SWSTATE_FLAG_UVD 0x02
34 #define PPSMC_SWSTATE_FLAG_VCE 0x04
36 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
37 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
38 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
40 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
41 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
42 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
H A Dtonga_ppsmc.h29 #define PPSMC_SWSTATE_FLAG_DC 0x01
30 #define PPSMC_SWSTATE_FLAG_UVD 0x02
31 #define PPSMC_SWSTATE_FLAG_VCE 0x04
32 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
H A Dfiji_ppsmc.h30 #define PPSMC_SWSTATE_FLAG_DC 0x01
31 #define PPSMC_SWSTATE_FLAG_UVD 0x02
32 #define PPSMC_SWSTATE_FLAG_VCE 0x04
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
42 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddrxd_map_firm.h18 #define HI_COMM_EXEC__A 0x400000
19 #define HI_COMM_MB__A 0x400002
20 #define HI_CT_REG_COMM_STATE__A 0x410001
21 #define HI_RA_RAM_SRV_RES__A 0x420031
22 #define HI_RA_RAM_SRV_CMD__A 0x420032
23 #define HI_RA_RAM_SRV_CMD_RESET 0x2
24 #define HI_RA_RAM_SRV_CMD_CONFIG 0x3
25 #define HI_RA_RAM_SRV_CMD_EXECUTE 0x6
26 #define HI_RA_RAM_SRV_RST_KEY__A 0x420033
27 #define HI_RA_RAM_SRV_RST_KEY_ACT 0x3973
[all …]
/linux/include/linux/mfd/da9063/
H A Dregisters.h18 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */
19 /* Page 1 : SPI access 0x080 - 0x0FF */
20 /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */
21 /* Page 3 : SPI access 0x180 - 0x1FF */
22 #define DA9063_REG_PAGE_CON 0x00
25 #define DA9063_REG_STATUS_A 0x01
26 #define DA9063_REG_STATUS_B 0x02
27 #define DA9063_REG_STATUS_C 0x03
28 #define DA9063_REG_STATUS_D 0x04
29 #define DA9063_REG_FAULT_LOG 0x05
[all …]
/linux/include/dt-bindings/input/
H A Dlinux-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
30 #define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */
32 #define INPUT_PROP_MAX 0x1f
39 #define EV_SYN 0x0
[all...]
/linux/include/uapi/linux/
H A Dinput-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
30 #define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */
32 #define INPUT_PROP_MAX 0x1f
39 #define EV_SYN 0x00
[all …]
/linux/arch/powerpc/include/asm/
H A Dreg_booke.h23 #define MSR_CM_LG 31 /* Computation Mode (0=32-bit, 1=64-bit) */
48 #define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */
49 #define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */
50 #define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */
51 #define SPRN_SPRG3R 0x103 /* Special Purpose Register General 3 Read */
52 #define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */
53 #define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */
54 #define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */
55 #define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */
56 #define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */
[all …]
/linux/drivers/power/supply/
H A Dbd99954-charger.h13 #define BD99954_ID 0x346
14 #define BD99955_ID 0x221
15 #define BD99956_ID 0x331
18 #define CHARGING_CURRENT 0x14
19 #define CHARGING_VOLTAGE 0x15
20 #define PROTECT_SET 0x3E
21 #define MAP_SET 0x3F
24 #define CHGSTM_STATUS 0x100
25 #define VBAT_VSYS_STATUS 0x101
26 #define VBUS_VCC_STATUS 0x102
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_radio.h9 #define RADIO_IDCODE 0x01
11 #define RADIO_DEFAULT_CORE 0
13 #define RXC0_RSSI_RST 0x80
14 #define RXC0_MODE_RSSI 0x40
15 #define RXC0_MODE_OFF 0x20
16 #define RXC0_MODE_CM 0x10
17 #define RXC0_LAN_LOAD 0x08
18 #define RXC0_OFF_ADJ_MASK 0x07
20 #define TXC0_MODE_TXLPF 0x04
21 #define TXC0_PA_TSSI_EN 0x02
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_AGE_CNTL 0x9bf
29 #define mmMC_ARB_RET_CREDITS2 0x9c0
30 #define mmMC_ARB_FED_CNTL 0x9c1
31 #define mmMC_ARB_GECC2_STATUS 0x9c2
32 #define mmMC_ARB_GECC2_MISC 0x9c3
33 #define mmMC_ARB_GECC2_DEBUG 0x9c4
34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
35 #define mmMC_ARB_PERF_CID 0x9c6
36 #define mmMC_ARB_GECC2 0x9c9
[all …]

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