Searched +full:0 +full:x13040000 (Results 1 – 7 of 7) sorted by relevance
64 #phy-cells = <0>;69 reg = <0x13040000 0x10000>;
50 '-[0-9]+$':112 reg = <0x13040000 0x10000>;121 uart0-0 {123 pinmux = <0xff140005>;128 slew-rate = <0>;132 pinmux = <0x0E000406>;137 slew-rate = <0>;
22 reg = <0 0x13000000 0 0x200>;29 reg = <0 0x13040000 0 0x30000>;55 reg = <0 0x14000000 0 0x1000>;62 reg = <0 0x14010000 0 0x1000>;64 mediatek,larb-id = <0>;74 reg = <0 0x16010000 0 0x1000>;86 reg = <0 0x15001000 0 0x1000>;99 reg = <0 0x15000000 0 0x1000>;106 reg = <0 0x10205000 0 0x1000>;117 reg = <0 0x15004000 0 0x1000>;[all …]
12 #size-cells = <0>;14 cpu0: cpu@0 {16 compatible = "ingenic,xburst-mxu1.0";17 reg = <0>;25 #address-cells = <0>;33 reg = <0x10001000 0x14>;44 #clock-cells = <0>;49 #clock-cells = <0>;55 reg = <0x10000000 0x100>;65 reg = <0x10002000 0x1000>;[all …]
12 #size-cells = <0>;14 cpu0: cpu@0 {16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";17 reg = <0>;25 #address-cells = <0>;33 reg = <0x10001000 0x40>;44 #clock-cells = <0>;49 #clock-cells = <0>;55 reg = <0x10000000 0x100>;58 ranges = <0x0 0x10000000 0x100>;[all …]
20 #size-cells = <0>;22 S7_0: cpu@0 {24 reg = <0>;200 cpu_opp: opp-table-0 {260 #clock-cells = <0>;265 #clock-cells = <0>;271 #clock-cells = <0>;277 #clock-cells = <0>;283 #clock-cells = <0>;289 #clock-cells = <0>;[all …]