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Searched +full:0 +full:x12c00000 (Results 1 – 9 of 9) sorted by relevance

/linux/arch/arm/include/debug/
H A Dexynos.S9 #define S3C_ADDR_BASE 0xF6000000
10 #define S3C_VA_UART S3C_ADDR_BASE + 0x01000000
11 #define EXYNOS4_PA_UART 0x13800000
12 #define EXYNOS5_PA_UART 0x12C00000
21 mrc p15, 0, \tmp, c0, c0, 0
22 and \tmp, \tmp, #0xf0
23 teq \tmp, #0xf0 @@ A15
25 mrc p15, 0, \tmp, c0, c0, 5
26 and \tmp, \tmp, #0xf00
27 teq \tmp, #0x100 @@ A15 + A7 but boot to A7
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dmediatek,mtk-nfc.yaml120 reg = <0 0x1100d000 0 0x1000>;
127 #size-cells = <0>;
129 nand@0 {
130 reg = <0>;
142 preloader@0 {
145 reg = <0x0 0x400000>;
149 reg = <0x400000 0x12c00000>;
/linux/arch/riscv/boot/dts/renesas/
H A Dr9a07g043f.dtsi17 #size-cells = <0>;
20 cpu0: cpu@0 {
24 reg = <0x0>;
32 i-cache-size = <0x8000>;
33 i-cache-line-size = <0x40>;
34 d-cache-size = <0x8000>;
35 d-cache-line-size = <0x40>;
50 gpio-ranges = <&pinctrl 0 0 232>;
59 reg = <0 0x110a0000 0 0x20000>;
61 #address-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5.dtsi40 reg = <0x10000000 0x100>;
45 reg = <0x12250000 0x14>;
53 reg = <0x10440000 0x1000>;
54 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
92 reg = <0x10481000 0x1000>,
93 <0x10482000 0x2000>,
94 <0x10484000 0x2000>,
95 <0x10486000 0x2000>;
102 reg = <0x10050000 0x5000>;
107 reg = <0x12c00000 0x100>;
[all …]
H A Dexynos5260.dtsi35 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x0>;
73 reg = <0x1>;
80 reg = <0x100>;
87 reg = <0x101>;
94 reg = <0x102>;
101 reg = <0x103>;
114 reg = <0x10010000 0x10000>;
128 reg = <0x10200000 0x10000>;
[all …]
H A Dexynos4.dtsi68 reg = <0x03810000 0x0c>;
79 reg = <0x03830000 0x100>;
88 samsung,idma-addr = <0x03000000>;
95 reg = <0x10000000 0x100>;
100 reg = <0x10500000 0x2000>;
105 reg = <0x12570000 0x14>;
110 reg = <0x10023c40 0x20>;
111 #power-domain-cells = <0>;
117 reg = <0x10023c60 0x20>;
118 #power-domain-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g057.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
30 cluster0_opp: opp-table-0 {
58 #size-cells = <0>;
60 cpu0: cpu@0 {
62 reg = <0>;
72 reg = <0x100>;
82 reg = <0x200>;
92 reg = <0x300>;
100 L3_CA55: cache-controller-0 {
[all …]
/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos850.dtsi52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x1>;
108 reg = <0x2>;
114 reg = <0x3>;
120 reg = <0x100>;
128 reg = <0x101>;
134 reg = <0x102>;
[all …]