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/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,usb3-drd-phy.yaml18 0 - UTMI+ type phy,
23 form of usbdrdphyN, N = 0, 1... (depending on number of controllers).
194 reg = <0x12100000 0x100>;
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3519.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
28 reg = <0x10301000 0x1000>, <0x10302000 0x1000>;
33 #clock-cells = <0>;
41 reg = <0x12010000 0x10000>;
53 reg = <0x12100000 0x1000>;
62 reg = <0x12101000 0x1000>;
71 reg = <0x12102000 0x1000>;
80 reg = <0x12103000 0x1000>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos54xx.dtsi42 <7 0>,
60 reg = <0x02020000 0x54000>;
63 ranges = <0 0x02020000 0x54000>;
65 smp-sram@0 {
67 reg = <0x0 0x1000>;
72 reg = <0x53000 0x1000>;
79 reg = <0x101c0000 0xb00>;
96 reg = <0x101d0000 0x100>;
102 reg = <0x12d10000 0x100>;
111 reg = <0x12ca0000 0x1000>;
[all …]
H A Dexynos5250.dtsi47 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
80 cpu0_opp_table: opp-table-0 {
176 reg = <0x02020000 0x30000>;
179 ranges = <0 0x02020000 0x30000>;
181 smp-sram@0 {
183 reg = <0x0 0x1000>;
188 reg = <0x2f000 0x1000>;
194 reg = <0x10044000 0x20>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos850.dtsi52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x1>;
108 reg = <0x2>;
114 reg = <0x3>;
120 reg = <0x100>;
128 reg = <0x101>;
134 reg = <0x102>;
[all …]
/linux/arch/arm64/boot/dts/tesla/
H A Dfsd.dtsi39 #size-cells = <0>;
88 /* Cluster 0 */
89 cpucl0_0: cpu@0 {
92 reg = <0x0 0x000>;
96 i-cache-size = <0xc000>;
99 d-cache-size = <0x8000>;
108 reg = <0x0 0x001>;
112 i-cache-size = <0xc000>;
115 d-cache-size = <0x8000>;
124 reg = <0x0 0x002>;
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064.dtsi25 reg = <0x80000000 0x200000>;
30 reg = <0x8f000000 0x700000>;
37 #size-cells = <0>;
39 CPU0: cpu@0 {
43 reg = <0>;
100 memory@0 {
102 reg = <0x0 0x0>;
111 coefficients = <1199 0>;
132 coefficients = <1132 0>;
153 coefficients = <1199 0>;
[all …]