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/freebsd/sys/dev/drm2/
H A Ddrm_edid_modes.h36 736, 832, 0, 350, 382, 385, 445, 0,
40 736, 832, 0, 400, 401, 404, 445, 0,
44 828, 936, 0, 400, 401, 404, 446, 0,
48 752, 800, 0, 480, 489, 492, 525, 0,
52 704, 832, 0, 480, 489, 492, 520, 0,
56 720, 840, 0, 480, 481, 484, 500, 0,
60 752, 832, 0, 480, 481, 484, 509, 0,
64 896, 1024, 0, 600, 601, 603, 625, 0,
68 968, 1056, 0, 600, 601, 605, 628, 0,
72 976, 1040, 0, 600, 637, 643, 666, 0,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-seattle-soc.dtsi20 reg = <0x0 0xe1110000 0 0x1000>,
21 <0x0 0xe112f000 0 0x2000>,
22 <0x0 0xe1140000 0 0x2000>,
23 <0x0 0xe1160000 0 0x2000>;
24 interrupts = <1 9 0xf04>;
25 ranges = <0 0 0 0xe1100000 0 0x100000>;
29 reg = <0x0 0x00080000 0 0x1000>;
35 interrupts = <1 13 0xff04>,
36 <1 14 0xff04>,
37 <1 11 0xff04>,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-simple-lvds-dual-ports.yaml44 # Lincoln Technology Solutions, LCD185-101CT 10.1" TFT 1920x1200
46 # Microtips Technology MF-101HIEBCAF0 10.1" WUXGA (1920x1200) TFT LCD panel
57 port@0:
84 - port@0
102 #size-cells = <0>;
104 port@0 {
106 reg = <0>;
H A Dpanel-simple-dsi.yaml51 # One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
106 #size-cells = <0>;
107 panel@0 {
109 reg = <0>;
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dtoshiba,tc358775.yaml17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
30 description: i2c address of the bridge, 0x0f
50 port@0:
83 - port@0
115 reg = <0x078b8000 0x500>;
118 #size-cells = <0>;
122 reg = <0x0f>;
132 #size-cells = <0>;
134 port@0 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-tqma9352-mba93xxca.dts37 pwms = <&tpm5 0 5000000 0>;
38 brightness-levels = <0 4 8 16 32 64 128 255>;
48 pinctrl-0 = <&pinctrl_pwmfan>;
52 pwms = <&tpm6 0 40000 PWM_POLARITY_INVERTED>;
53 cooling-levels = <0 32 64 128 196 240>;
99 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>;
148 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
201 pinctrl-0 = <&pinctrl_eqos>;
209 #size-cells = <0>;
211 ethphy_eqos: ethernet-phy@0 {
[all …]
H A Dimx93-tqma9352-mba93xxla.dts37 pwms = <&tpm5 0 5000000 0>;
38 brightness-levels = <0 4 8 16 32 64 128 255>;
47 #clock-cells = <0>;
90 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>;
105 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
134 pinctrl-0 = <&pinctrl_eqos>;
142 #size-cells = <0>;
144 ethphy_eqos: ethernet-phy@0 {
146 reg = <0>;
148 pinctrl-0 = <&pinctrl_eqos_phy>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra62x.dtsi11 reg = <0 0x800>,
12 <0x1200 0x100>;
16 reg = <0x1000 0x100>;
/freebsd/sys/powerpc/include/
H A Dtrap.h39 #define EXC_RSVD 0x0000 /* Reserved */
40 #define EXC_RST 0x0100 /* Reset; all but IBM4xx */
41 #define EXC_MCHK 0x0200 /* Machine Check */
42 #define EXC_DSI 0x0300 /* Data Storage Interrupt */
43 #define EXC_DSE 0x0380 /* Data Segment Interrupt */
44 #define EXC_ISI 0x0400 /* Instruction Storage Interrupt */
45 #define EXC_ISE 0x0480 /* Instruction Segment Interrupt */
46 #define EXC_EXI 0x0500 /* External Interrupt */
47 #define EXC_ALI 0x0600 /* Alignment Interrupt */
48 #define EXC_PGM 0x0700 /* Program Interrupt */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Drealtek,rtl-spi.yaml38 reg = <0x1200 0x100>;
40 #size-cells = <0>;
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dnvidia,tegra20-apbdma.txt23 reg = <0x6000a000 0x1200>;
24 interrupts = < 0 136 0x04
25 0 137 0x04
26 0 138 0x04
27 0 13
[all...]
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dti,sa2ul.yaml93 reg = <0x4e00000 0x1200>;
95 dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
96 <&main_udmap 0x4001>;
/freebsd/sys/contrib/device-tree/src/mips/realtek/
H A Drtl930x.dtsi10 #size-cells = <0>;
12 cpu@0 {
15 reg = <0>;
16 clocks = <&baseclk 0>;
23 #clock-cells = <0>;
29 #clock-cells = <0>;
37 reg = <0x3000 0x18>, <0x3018 0x18>;
47 reg = <0x1200 0x100>;
50 #size-cells = <0>;
55 reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
[all …]
/freebsd/sys/compat/linuxkpi/common/include/linux/
H A Dpci_ids.h33 #define PCI_CLASS_NETWORK_OTHER 0x0280
35 #define PCI_BASE_CLASS_DISPLAY 0x03
36 #define PCI_CLASS_DISPLAY_VGA 0x0300
37 #define PCI_CLASS_DISPLAY_OTHER 0x0380
39 #define PCI_BASE_CLASS_BRIDGE 0x06
40 #define PCI_CLASS_BRIDGE_ISA 0x0601
42 #define PCI_CLASS_ACCELERATOR_PROCESSING 0x1200
47 #define PCI_VENDOR_ID_APPLE 0x106b
48 #define PCI_VENDOR_ID_ASUSTEK 0x1043
49 #define PCI_VENDOR_ID_ATHEROS 0x168c
[all …]
/freebsd/sys/dev/usb/video/
H A Dudl.h82 #define DLALL 0x0000
83 #define DL125 0x0000 /* max 1280x1024, 1440x900 */
84 #define DL120 0x0001 /* max 1280x1024, 1440x1050 */
85 #define DL160 0x0002 /* max 1600x1200, 1680x1050 */
86 #define DL165 0x0003 /* max 1600x1200, 1920x1080 */
87 #define DL195 0x0004 /* max 1920x1200, 2048x1152 */
88 #define DLMAX 0x0004
89 #define DLUNK 0x00ff /* unknown */
102 #define UDL_CTRL_CMD_READ_EDID 0x02
103 #define UDL_CTRL_CMD_WRITE_1 0x03
[all …]
/freebsd/usr.sbin/bluetooth/rtlbtfw/
H A Drtlbt_fw.h35 #define RTLBT_ROM_LMP_8703B 0x8703
36 #define RTLBT_ROM_LMP_8723A 0x1200
37 #define RTLBT_ROM_LMP_8723B 0x8723
38 #define RTLBT_ROM_LMP_8821A 0x8821
39 #define RTLBT_ROM_LMP_8761A 0x8761
40 #define RTLBT_ROM_LMP_8822B 0x8822
41 #define RTLBT_ROM_LMP_8852A 0x8852
42 #define RTLBT_ROM_LMP_8851B 0x8851
57 #define RTLBT_IC_FLAG_SIMPLE (0 << 1)
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Drcar-gen4-pci-ep.yaml100 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>,
101 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
102 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
103 <0 0xfe000000 0 0x400000>;
H A Drcar-gen4-pci-host.yaml98 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
99 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
100 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
101 <0 0xfe000000 0 0x400000>;
117 bus-range = <0x00 0xff>;
119 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
120 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
121 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
123 interrupt-map-mask = <0 0 0 7>;
124 interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,msm8996-qmp-pcie-phy.yaml57 "^phy@[0-9a-f]+$":
92 const: 0
98 const: 0
130 reg = <0x34000 0x488>;
133 ranges = <0x0 0x34000 0x4000>;
149 reg = <0x1000 0x130>,
150 <0x1200 0x200>,
151 <0x1400 0x1dc>;
156 #clock-cells = <0>;
159 #phy-cells = <0>;
[all …]
H A Dphy-mtk-tphy.txt5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dovti,ov02a10.yaml17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The
89 If present, the value shall be in the range of 0-4.
119 #size-cells = <0>;
123 reg = <0x3d>;
/freebsd/sys/dev/usb/net/
H A Dif_ruereg.h29 #define RUE_CONFIG_IDX 0 /* config number 1 */
30 #define RUE_IFACE_IDX 0
32 #define RUE_INTR_PKTLEN 0x8
38 #define RUE_IDR0 0x0120
39 #define RUE_IDR1 0x0121
40 #define RUE_IDR2 0x0122
41 #define RUE_IDR3 0x0123
42 #define RUE_IDR4 0x0124
43 #define RUE_IDR5 0x0125
45 #define RUE_MAR0 0x0126
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8775p-pmics.dtsi11 pmm8654au_0_thermal: pm8775-0-thermal {
19 hysteresis = <0>;
25 hysteresis = <0>;
39 hysteresis = <0>;
45 hysteresis = <0>;
59 hysteresis = <0>;
65 hysteresis = <0>;
79 hysteresis = <0>;
85 hysteresis = <0>;
96 mode-recovery = <0x01>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dtqm5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dcharon.dts23 #size-cells = <0>;
25 PowerPC,5200@0 {
27 reg = <0>;
30 d-cache-size = <0x4000>; // L1, 16K
31 i-cache-size = <0x4000>; // L1, 16K
32 timebase-frequency = <0>; // from bootloader
33 bus-frequency = <0>; // from bootloader
34 clock-frequency = <0>; // from bootloader
38 memory@0 {
40 reg = <0x00000000 0x08000000>; // 128MB
[all …]

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