Searched +full:0 +full:x11f20000 (Results 1 – 15 of 15) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | mediatek,mt7988-xfi-tphy.yaml | 49 const: 0 70 reg = <0 0x11f20000 0 0x10000>; 76 #phy-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | mediatek,mt8192-pinctrl.yaml | 149 reg = <0x10005000 0x1000>, 150 <0x11c20000 0x1000>, 151 <0x11d10000 0x1000>, 152 <0x11d30000 0x1000>, 153 <0x11d40000 0x1000>, 154 <0x11e20000 0x1000>, 155 <0x11e70000 0x1000>, 156 <0x11ea0000 0x1000>, 157 <0x11f20000 0x1000>, 158 <0x11f30000 0x1000>, [all …]
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H A D | pinctrl-mt8192.yaml | 148 reg = <0x10005000 0x1000>, 149 <0x11c20000 0x1000>, 150 <0x11d10000 0x1000>, 151 <0x11d30000 0x1000>, 152 <0x11d40000 0x1000>, 153 <0x11e20000 0x1000>, 154 <0x11e70000 0x1000>, 155 <0x11ea0000 0x1000>, 156 <0x11f20000 0x1000>, 157 <0x11f30000 0x1000>, [all …]
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H A D | pinctrl-mt8183.txt | 53 Valid arguments are from 0 to 3. 57 are from 0 to 15. 60 are from 0 to 63. 75 driving setup property. "XXX" means the value of E1E0EN. EN is 0 or 1. 78 When E1=0/E0=0, the strength is 0.125mA. 79 When E1=0/E0=1, the strength is 0.25mA. 80 When E1=1/E0=0, the strength is 0.5mA. 82 So the valid arguments of "mediatek,drive-strength-adv" are from 0 to 7. 92 reg = <0 0x10005000 0 0x1000>, 93 <0 0x11f20000 0 0x1000>, [all …]
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H A D | mediatek,mt6779-pinctrl.yaml | 114 '-[0-9]*$': 158 enum: [0, 1] 165 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 166 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 167 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 170 enum: [0, 1, 2, 3] 177 0: (R1, R0) = (0, [all...] |
H A D | mediatek,mt8183-pinctrl.yaml | 126 When E1=0/E0=0, the strength is 0.125mA. 127 When E1=0/E0=1, the strength is 0.25mA. 128 When E1=1/E0=0, the strength is 0.5mA. 132 0: (E1, E0, EN) = (0, 0, 0) 133 1: (E1, E0, EN) = (0, 0, [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt7981b.dtsi | 15 #size-cells = <0>; 17 cpu@0 { 19 reg = <0x0>; 26 reg = <0x1>; 36 #clock-cells = <0>; 52 reg = <0 0x0c000000 0 0x40000>, /* GICD */ 53 <0 0x0c080000 0 0x200000>; /* GICR */ 62 reg = <0 0x10001000 0 0x1000>; 68 reg = <0 0x1001b000 0 0x1000>; 74 reg = <0 0x1001c000 0 0x1000>; [all …]
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H A D | mt6779.dtsi | 26 #size-cells = <0>; 28 cpu0: cpu@0 { 32 reg = <0x000>; 39 reg = <0x100>; 46 reg = <0x200>; 53 reg = <0x300>; 60 reg = <0x400>; 67 reg = <0x500>; 74 reg = <0x600>; 81 reg = <0x700>; [all …]
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H A D | mt8188.dtsi | 27 #size-cells = <0>; 29 cpu0: cpu@0 { 32 reg = <0x000>; 50 reg = <0x100>; 68 reg = <0x200>; 86 reg = <0x300>; 104 reg = <0x400>; 122 reg = <0x500>; 140 reg = <0x600>; 158 reg = <0x700>; [all …]
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H A D | mt8192.dtsi | 36 #clock-cells = <0>; 45 #clock-cells = <0>; 52 #clock-cells = <0>; 59 #size-cells = <0>; 61 cpu0: cpu@0 { 64 reg = <0x000>; 75 performance-domains = <&performance 0>; 83 reg = <0x100>; 94 performance-domains = <&performance 0>; 102 reg = <0x200>; [all …]
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H A D | mt8183.dtsi | 293 #size-cells = <0>; 327 cpu0: cpu@0 { 330 reg = <0x000>; 353 reg = <0x001>; 376 reg = <0x002>; 399 reg = <0x003>; 422 reg = <0x100>; 445 reg = <0x101>; 468 reg = <0x102>; 491 reg = <0x103>; [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/ |
H A D | soc.c | 18 #define MT7981_CON_INFRA_VERSION 0x02090000 19 #define MT7986_CON_INFRA_VERSION 0x02070000 22 #define MT_INFRACFG_CONN2AP_SLPPROT 0x0d0 23 #define MT_INFRACFG_AP2CONN_SLPPROT 0x0d4 27 #define MT_INFRACFG_TX_EN_MASK BIT(0) 30 #define MT_TOP_POS_FAST_CTRL 0x114 33 #define MT_TOP_POS_SKU 0x21c 56 mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), 0); in mt76_wmac_spi_read() 66 return 0; in mt76_wmac_spi_read() 118 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, BIT(30), 0x0); in mt7986_wmac_adie_efuse_read() [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5250.dtsi | 47 #size-cells = <0>; 60 cpu0: cpu@0 { 63 reg = <0>; 80 cpu0_opp_table: opp-table-0 { 176 reg = <0x02020000 0x30000>; 179 ranges = <0 0x02020000 0x30000>; 181 smp-sram@0 { 183 reg = <0x0 0x1000>; 188 reg = <0x2f000 0x1000>; 194 reg = <0x10044000 0x20>; [all …]
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H A D | exynos5420.dtsi | 153 cluster_a15_opp_table: opp-table-0 { 270 reg = <0x10d20000 0x1000>; 271 ranges = <0x0 0x10d20000 0x6000>; 276 reg = <0x4000 0x1000>; 281 reg = <0x5000 0x1000>; 287 reg = <0x10010000 0x30000>; 293 reg = <0x03810000 0x0c>; 303 reg = <0x11000000 0x10000>; 316 #size-cells = <0>; 317 reg = <0x12200000 0x2000>; [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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