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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl.yaml90 "^[a-z]+[0-9]*-gpio-bank$":
169 reg = <0x7f008000 0x1000>;
175 interrupts-extended = <&vic0 0>,
177 <&vic1 0>,
192 samsung,pins = "gpa-0", "gpa-1";
194 samsung,pin-pud = <0>;
205 reg = <0x11400000 0x1000>;
209 pinctrl-0 = <&sleep0>;
222 samsung,pins = "gpa0-0", "gpa0-1";
224 samsung,pin-pud = <0>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5260.dtsi35 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x0>;
73 reg = <0x1>;
80 reg = <0x100>;
87 reg = <0x101>;
94 reg = <0x102>;
101 reg = <0x103>;
114 reg = <0x10010000 0x10000>;
128 reg = <0x10200000 0x10000>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
96 i-cache-size = <0x8000>;
99 d-cache-size = <0x8000>;
109 reg = <0x101>;
112 i-cache-size = <0x8000>;
115 d-cache-size = <0x8000>;
125 reg = <0x102>;
128 i-cache-size = <0x8000>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk322x.dtsi30 #size-cells = <0>;
35 reg = <0xf00>;
47 reg = <0xf01>;
57 reg = <0xf02>;
67 reg = <0xf03>;
75 cpu0_opp_table: opp-table-0 {
131 #clock-cells = <0>;
141 reg = <0x100b0000 0x4000>;
148 pinctrl-0 = <&i2s1_bus>;
154 reg = <0x100c0000 0x4000>;
[all …]