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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dmediatek,nand-ecc-engine.yaml58 reg = <0 0x1100e000 0 0x1000>;
H A Dmtk-nand.txt25 - #size-cells: Should be 0.
31 reg = <0 0x1100d000 0 0x1000>;
38 #size-cells = <0>;
45 - reg: Chip Select Signal, default 0.
46 Set as reg = <0>, <1> when need 2 CS.
86 - pinctrl-0: GPIO setting node.
123 pinctrl-0 = <&nand_pins_default>;
124 nand@0 {
125 reg = <0>;
137 nand@0 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt6797.dtsi25 #size-cells = <0>;
27 cpu0: cpu@0 {
31 reg = <0x000>;
38 reg = <0x001>;
45 reg = <0x002>;
52 reg = <0x003>;
59 reg = <0x100>;
66 reg = <0x101>;
73 reg = <0x102>;
80 reg = <0x103>;
[all …]
H A Dmt7622.dtsi69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
140 reg = <0 0x43000000 0 0x30000>;
150 thermal-sensors = <&thermal 0>;
216 reg = <0 0x10000000 0 0x1000>;
223 reg = <0 0x10001000 0 0x250>;
[all …]
H A Dmt2712e.dtsi22 cluster0_opp: opp-table-0 {
66 #size-cells = <0>;
85 cpu0: cpu@0 {
88 reg = <0x000>;
100 reg = <0x001>;
113 reg = <0x200>;
126 CPU_SLEEP_0: cpu-sleep-0 {
132 arm,psci-suspend-param = <0x0010000>;
135 CLUSTER_SLEEP_0: cluster-sleep-0 {
141 arm,psci-suspend-param = <0x1010000>;
[all …]
H A Dmt8365.dtsi38 #size-cells = <0>;
40 cluster0_opp: opp-table-0 {
142 cpu0: cpu@0 {
145 reg = <0x0>;
149 i-cache-size = <0x8000>;
152 d-cache-size = <0x8000>;
165 reg = <0x1>;
169 i-cache-size = <0x8000>;
172 d-cache-size = <0x8000>;
185 reg = <0x2>;
[all …]
H A Dmt8192.dtsi36 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #clock-cells = <0>;
59 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
75 performance-domains = <&performance 0>;
83 reg = <0x100>;
94 performance-domains = <&performance 0>;
102 reg = <0x200>;
[all …]
H A Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]
H A Dmt8186.dtsi35 reg = <0 0x1000ce00 0 0x200>;
336 #size-cells = <0>;
374 cpu0: cpu@0 {
377 reg = <0x000>;
401 reg = <0x100>;
425 reg = <0x200>;
449 reg = <0x300>;
473 reg = <0x400>;
497 reg = <0x500>;
521 reg = <0x600>;
[all …]
H A Dmt8188.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x000>;
78 performance-domains = <&performance 0>;
85 reg = <0x100>;
97 performance-domains = <&performance 0>;
104 reg = <0x200>;
116 performance-domains = <&performance 0>;
123 reg = <0x300>;
135 performance-domains = <&performance 0>;
[all …]
H A Dmt8195.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt2701.dtsi25 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x0>;
36 reg = <0x1>;
41 reg = <0x2>;
46 reg = <0x3>;
57 reg = <0 0x80002000 0 0x1000>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
73 clk26m: oscillator@0 {
[all …]
H A Dmt7623.dtsi73 #size-cells = <0>;
76 cpu0: cpu@0 {
79 reg = <0x0>;
91 reg = <0x1>;
103 reg = <0x2>;
115 reg = <0x3>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
147 clk26m: oscillator-0 {
149 #clock-cells = <0>;
[all …]