Searched +full:0 +full:x1080000 (Results 1 – 8 of 8) sorted by relevance
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | mscc,vsc7514-switch.yaml | 132 reg = <0x1010000 0x10000>, 133 <0x1030000 0x10000>, 134 <0x1080000 0x100>, 135 <0x10e0000 0x10000>, 136 <0x11e0000 0x100>, 137 <0x11f0000 0x100>, 138 <0x1200000 0x100>, 139 <0x1210000 0x100>, 140 <0x1220000 0x100>, 141 <0x1230000 0x100>, [all …]
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| /linux/arch/mips/boot/dts/mscc/ |
| H A D | ocelot.dtsi | 11 #size-cells = <0>; 13 cpu@0 { 17 reg = <0>; 26 #address-cells = <0>; 34 #clock-cells = <0>; 40 #clock-cells = <0>; 50 ranges = <0 0x70000000 0x2000000>; 54 cpu_ctrl: syscon@0 { 56 reg = <0x0 0x2c>; 61 reg = <0x70 0x70>; [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls208xa.dtsi | 33 #size-cells = <0>; 38 reg = <0x00000000 0x80000000 0 0x80000000>; 44 #clock-cells = <0>; 51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ 52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */ 53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */ 54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */ 55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */ 67 reg = <0x0 0x6020000 0 0x20000>; 73 reg = <0x0 0x1e60000 0x0 0x4>; [all …]
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| H A D | fsl-ls1028a.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 28 reg = <0x0>; 30 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 31 i-cache-size = <0xc000>; 34 d-cache-size = <0x8000>; 45 reg = <0x1>; 47 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 48 i-cache-size = <0xc000>; 51 d-cache-size = <0x8000>; [all …]
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| H A D | fsl-lx2160a.dtsi | 12 /memreserve/ 0x80000000 0x00010000; 26 #size-cells = <0>; 29 cpu0: cpu@0 { 33 reg = <0x0>; 34 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 35 d-cache-size = <0x8000>; 38 i-cache-size = <0xC000>; 50 reg = <0x1>; 51 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 52 d-cache-size = <0x8000>; [all …]
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| /linux/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
| H A D | nbio_7_9_0_offset.h | 29 // base address: 0x0 30 …BIF_BX0_PCIE_INDEX 0x000c 31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0 32 …BIF_BX0_PCIE_DATA 0x000d 33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0 34 …BIF_BX0_PCIE_INDEX2 0x000e 35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0 36 …BIF_BX0_PCIE_DATA2 0x000f 37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0 38 …BIF_BX0_PCIE_INDEX_HI 0x0010 [all …]
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| H A D | nbio_7_7_0_offset.h | 29 // base address: 0x0 30 …NBCFG_SCRATCH_4 0x0078 34 // base address: 0x0 35 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000 36 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002 37 …BIF_CFG_DEV0_RC_COMMAND 0x0004 38 …BIF_CFG_DEV0_RC_STATUS 0x0006 39 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008 40 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009 41 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a [all …]
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| /linux/drivers/media/dvb-frontends/drx39xyj/ |
| H A D | drxj_map.h | 37 * Generated by: IDF:x 1.3.0 56 #define ATV_COMM_EXEC__A 0xC00000 58 #define ATV_COMM_EXEC__M 0x3 59 #define ATV_COMM_EXEC__PRE 0x0 60 #define ATV_COMM_EXEC_STOP 0x0 61 #define ATV_COMM_EXEC_ACTIVE 0x1 62 #define ATV_COMM_EXEC_HOLD 0x2 64 #define ATV_COMM_STATE__A 0xC00001 66 #define ATV_COMM_STATE__M 0xFFFF 67 #define ATV_COMM_STATE__PRE 0x0 [all …]
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