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/freebsd/sys/contrib/device-tree/Bindings/mips/cavium/
H A Dcib.txt26 reg = <0x10700 0x0000e000 0x0 0x8>, /* RAW */
27 <0x10700 0x0000e100 0x0 0x8>; /* EN */
H A Dciu.txt13 the CIU and may have a value of 0 or 1. The second cell is the bit
14 within the bank and may have a value between 0 and 63.
21 * 1) Controller register (0 or 1)
22 * 2) Bit within the register (0..63)
25 reg = <0x10700 0x00000000 0x0 0x7000>;
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-octeon.txt8 - #size-cells : <0>, also as required by generic SPI binding.
16 reg = <0x10700 0x00001000 0x0 0x100>;
17 interrupts = <0 58>;
19 #size-cells = <0>;
21 eeprom@0 {
23 reg = <0>;
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dcavium-mix.txt26 reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */
27 <0x11800 0xE0000800 0x0 0x300>, /* AGL */
28 <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */
29 <0x11800 0xE0002008 0x0 0x8>; /* AGL_PRT_CTL */
32 local-mac-address = [ 00 0f b7 10 63 54 ];
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dcavium,octeon-3860-gpio.yaml51 reg = <0x10700 0x00000800 0x0 0x100>;
57 interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
58 <0 20>, <0 21>, <0 22>, <0 23>,
59 <0 24>, <0 25>, <0 26>, <0 27>,
60 <0 28>, <0 29>, <0 30>, <0 31>;
H A Dcavium-octeon-gpio.txt33 reg = <0x10700 0x00000800 0x0 0x100>;
36 * 1) GPIO pin number (0..15)
45 interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
46 <0 20>, <0 21>, <0 22>, <0 23>,
47 <0 24>, <0 25>, <0 26>, <0 27>,
48 <0 28>, <0 29>, <0 30>, <0 31>;
/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/
H A Docteon_3xxx.dtsi12 soc@0 {
22 * 1) Controller register (0 or 1)
23 * 2) Bit within the register (0..63)
26 reg = <0x10700 0x00000000 0x0 0x7000>;
32 reg = <0x10700 0x00000800 0x0 0x100>;
35 * 1) GPIO pin number (0..15)
44 interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
45 <0 20>, <0 21>, <0 22>, <0 23>,
46 <0 24>, <0 25>, <0 26>, <0 27>,
47 <0 28>, <0 29>, <0 30>, <0 31>;
[all …]
H A Docteon_3xxx.dts13 soc@0 {
15 phy0: ethernet-phy@0 {
19 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
24 reg = <0>;
31 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
33 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
35 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
42 marvell,reg-init = <3 0x10 0 0x5777>,
[all …]
H A Docteon_68xx.dts16 soc@0 {
26 * 1) Controller register (0 or 7)
27 * 2) Bit within the register (0..63)
29 #address-cells = <0>;
31 reg = <0x10701 0x00000000 0x0 0x4000000>;
37 reg = <0x10700 0x00000800 0x0 0x100>;
40 * 1) GPIO pin number (0..15)
49 interrupts = <7 0>, <7 1>, <7 2>, <7 3>,
58 #size-cells = <0>;
59 reg = <0x11800 0x00003800 0x0 0x40>;
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t4.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
8 { "PIDX", 0, 14 },
9 { "SGE_PF_GTS", 0x1e004, 0 },
13 { "CIDXInc", 0, 12 },
14 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
17 { "PIDX", 0, 14 },
18 { "SGE_PF_GTS", 0x1e404, 0 },
22 { "CIDXInc", 0, 12 },
23 { "SGE_PF_KDOORBELL", 0x1e800, 0 },
26 { "PIDX", 0, 14 },
[all …]
H A Dreg_defs_t5.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]