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/linux/Documentation/devicetree/bindings/spi/
H A Dmarvell,orion-spi.yaml72 #size-cells = <0>;
73 cell-index = <0>;
74 reg = <0x10600 0x28>;
75 clocks = <&coreclk 0>;
88 #size-cells = <0>;
89 cell-index = <0>;
90 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
91 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
92 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
93 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
[all …]
H A Dmarvell,armada-3700-spi.yaml49 #size-cells = <0>;
50 reg = <0x10600 0x5d>;
52 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
/linux/arch/arm/mach-dove/
H A Ddove.h14 * e0000000 @runtime 128M PCIe-0 Memory space
18 * f2000000 fee00000 1M PCIe-0 I/O space
22 #define DOVE_CESA_PHYS_BASE 0xc8000000
23 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
26 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
29 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
32 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
35 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
36 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
39 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]
/linux/sound/pci/au88x0/
H A Dau8820.h19 #define NR_ADB 0x10
20 #define NR_WT 0x20
21 #define NR_SRC 0x10
22 #define NR_A3D 0x00
23 #define NR_MIXIN 0x10
24 #define NR_MIXOUT 0x10
28 #define VORTEX_ADBDMA_STAT 0x105c0 /* read only, subbuffer, DMA pos */
29 #define POS_MASK 0x00000fff
30 #define POS_SHIFT 0x0
31 #define ADB_SUBBUF_MASK 0x00003000 /* ADB only. */
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dorion5x.dtsi24 reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>;
25 ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>;
28 clocks = <&core_clk 0>;
34 reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>;
35 ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>;
38 clocks = <&core_clk 0>;
44 reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>;
45 ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>;
48 clocks = <&core_clk 0>;
54 reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>;
[all …]
H A Darmada-370-xp.dtsi29 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
47 pcie-mem-aperture = <0xf8000000 0x7e00000>;
48 pcie-io-aperture = <0xffe00000 0x100000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
[all …]
H A Dkirkwood.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
37 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */
38 MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */
39 MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */
42 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
43 pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
48 cle = <0>;
52 reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
[all …]
H A Darmada-39x.dtsi32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
H A Darmada-375.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0>;
75 pcie-mem-aperture = <0xe0000000 0x8000000>;
76 pcie-io-aperture = <0xe8000000 0x100000>;
80 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
85 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
86 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
[all …]
H A Ddove.dtsi22 #size-cells = <0>;
24 cpu0: cpu@0 {
28 reg = <0>;
34 marvell,tauros2-cache-features = <0>;
46 #size-cells = <0>;
51 pinctrl-0 = <&pmx_i2cmux_0>;
55 i2c0: i2c@0 {
56 reg = <0>;
58 #size-cells = <0>;
65 #size-cells = <0>;
[all …]
H A Darmada-38x.dtsi42 pcie-mem-aperture = <0xe0000000 0x8000000>;
43 pcie-io-aperture = <0xe8000000 0x100000>;
47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
66 clocks = <&coreclk 0>;
72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
[all …]
/linux/drivers/media/pci/cx23885/
H A Dcx23885-reg.h13 0x00000000 -> 0x00009000 TX SRAM (Fifos)
14 0x00010000 -> 0x00013c00 RX SRAM CMDS + CDT
16 EACH CMDS struct is 0x80 bytes long
18 DMAx_PTR1 = 0x03040 address of first cluster
19 DMAx_PTR2 = 0x10600 address of the CDT
24 DWORD 0 -> ptr to cluster
30 0 IntialProgramCounterLow
41 #define RISC_CNT_INC 0x00010000
42 #define RISC_CNT_RESET 0x00030000
43 #define RISC_IRQ1 0x01000000
[all …]
/linux/drivers/gpu/drm/radeon/
H A Drv515.c47 0,
59 radeon_ring_write(ring, PACKET0(ISYNC_CNTL, 0)); in rv515_ring_start()
65 radeon_ring_write(ring, PACKET0(WAIT_UNTIL, 0)); in rv515_ring_start()
67 radeon_ring_write(ring, PACKET0(R300_DST_PIPE_CONFIG, 0)); in rv515_ring_start()
69 radeon_ring_write(ring, PACKET0(GB_SELECT, 0)); in rv515_ring_start()
70 radeon_ring_write(ring, 0); in rv515_ring_start()
71 radeon_ring_write(ring, PACKET0(GB_ENABLE, 0)); in rv515_ring_start()
72 radeon_ring_write(ring, 0); in rv515_ring_start()
73 radeon_ring_write(ring, PACKET0(R500_SU_REG_DEST, 0)); in rv515_ring_start()
75 radeon_ring_write(ring, PACKET0(VAP_INDEX_OFFSET, 0)); in rv515_ring_start()
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_mr.c30 * 0 : QLA_SUCCESS = cmd performed success
42 unsigned long flags = 0; in qlafx00_mailbox_command()
46 uint16_t command = 0; in qlafx00_mailbox_command()
56 ql_log(ql_log_warn, vha, 0x115c, in qlafx00_mailbox_command()
62 ql_log(ql_log_warn, vha, 0x115f, in qlafx00_mailbox_command()
74 ql_log(ql_log_warn, vha, 0x1175, in qlafx00_mailbox_command()
81 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qlafx00_mailbox_command()
82 ql_log(ql_log_warn, vha, 0x1176, in qlafx00_mailbox_command()
95 ql_log(ql_log_warn, vha, 0x1177, in qlafx00_mailbox_command()
96 "Cmd access timeout, cmd=0x%x, Exiting.\n", in qlafx00_mailbox_command()
[all …]
/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt.c149 { PCI_VDEVICE(BROADCOM, 0x1604), .driver_data = BCM5745x_NPAR },
150 { PCI_VDEVICE(BROADCOM, 0x1605), .driver_data = BCM5745x_NPAR },
151 { PCI_VDEVICE(BROADCOM, 0x1614), .driver_data = BCM57454 },
152 { PCI_VDEVICE(BROADCOM, 0x16c0), .driver_data = BCM57417_NPAR },
153 { PCI_VDEVICE(BROADCOM, 0x16c8), .driver_data = BCM57301 },
154 { PCI_VDEVICE(BROADCOM, 0x16c9), .driver_data = BCM57302 },
155 { PCI_VDEVICE(BROADCOM, 0x16ca), .driver_data = BCM57304 },
156 { PCI_VDEVICE(BROADCOM, 0x16cc), .driver_data = BCM57417_NPAR },
157 { PCI_VDEVICE(BROADCOM, 0x16cd), .driver_data = BCM58700 },
158 { PCI_VDEVICE(BROADCOM, 0x16ce), .driver_data = BCM57311 },
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h36 #define MC_SMEM_P0_DOORBELL_OFST 0x000
37 #define MC_SMEM_P1_DOORBELL_OFST 0x004
39 #define MC_SMEM_P0_PDU_OFST 0x008
40 #define MC_SMEM_P1_PDU_OFST 0x108
41 #define MC_SMEM_PDU_LEN 0x100
42 #define MC_SMEM_P0_PTP_TIME_OFST 0x7f0
43 #define MC_SMEM_P0_STATUS_OFST 0x7f8
44 #define MC_SMEM_P1_STATUS_OFST 0x7fc
48 #define MC_STATUS_DWORD_REBOOT (0xb007b007)
49 #define MC_STATUS_DWORD_ASSERT (0xdeaddead)
[all …]