Searched +full:0 +full:x10480000 (Results 1 – 5 of 5) sorted by relevance
/linux/Documentation/devicetree/bindings/clock/ |
H A D | starfive,jh7100-audclk.yaml | 51 reg = <0x10480000 0x10000>;
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/linux/Documentation/devicetree/bindings/devfreq/event/ |
H A D | samsung,exynos-ppmu.yaml | 43 '^ppmu-event[0-9]+(-[a-z0-9]+){,2}$': 80 reg = <0x106a0000 0x2000>; 103 reg = <0x112a0000 0x2000>; 118 reg = <0x10480000 0x2000>; 123 reg = <0x10490000 0x2000>; 134 reg = <0x104a0000 0x2000>; 139 reg = <0x104b0000 0x2000>; 144 reg = <0x104c0000 0x2000>; 149 reg = <0x104d0000 0x2000>; 158 reg = <0x106a0000 0x2000>;
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos4.dtsi | 68 reg = <0x03810000 0x0c>; 79 reg = <0x03830000 0x100>; 88 samsung,idma-addr = <0x03000000>; 95 reg = <0x10000000 0x100>; 100 reg = <0x10500000 0x2000>; 105 reg = <0x12570000 0x14>; 110 reg = <0x10023c40 0x20>; 111 #power-domain-cells = <0>; 117 reg = <0x10023c60 0x20>; 118 #power-domain-cells = <0>; [all …]
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/linux/drivers/net/ethernet/microchip/sparx5/ |
H A D | sparx5_main.c | 53 { TARGET_CPU, 0, 0 }, /* 0x600000000 */ 54 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */ 55 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */ 56 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */ 57 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */ 58 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */ 59 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */ 60 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */ 61 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */ 62 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */ [all …]
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/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos5433.dtsi | 48 #clock-cells = <0>; 53 #size-cells = <0>; 91 reg = <0x100>; 96 i-cache-size = <0x8000>; 99 d-cache-size = <0x8000>; 109 reg = <0x101>; 112 i-cache-size = <0x8000>; 115 d-cache-size = <0x8000>; 125 reg = <0x102>; 128 i-cache-size = <0x8000>; [all …]
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