Searched +full:0 +full:x10212000 (Results 1 – 14 of 14) sorted by relevance
84 reg = <0 0x10212000 0 0x1000>;
53 reg = <0 0x10212000 0 0x1000>;64 mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>,68 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>,69 <&gce SUBSYS_1401XXXX 0x2000 0x100>;76 reg = <0 0x14020000 0 0x1000>;
19 #size-cells = <0>;21 cpu@0 {24 reg = <0x0>;29 reg = <0x1>;34 reg = <0x2>;39 reg = <0x3>;47 #clock-cells = <0>;53 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x10008000 0x80>;[all …]
17 #size-cells = <0>;19 cpu@0 {22 reg = <0x0>;27 reg = <0x1>;32 reg = <0x2>;37 reg = <0x3>;44 #clock-cells = <0>;50 #clock-cells = <0>;56 #clock-cells = <0>;61 reg = <0x10008000 0x80>;[all …]
19 #size-cells = <0>;22 cpu@0 {25 reg = <0x0>;30 reg = <0x1>;35 reg = <0x2>;40 reg = <0x3>;54 #clock-cells = <0>;60 #clock-cells = <0>;66 #clock-cells = <0>;78 reg = <0x10008000 0x80>;[all …]
19 #size-cells = <0>;21 cpu@0 {24 reg = <0x0>;29 reg = <0x1>;34 reg = <0x2>;39 reg = <0x3>;44 reg = <0x4>;49 reg = <0x5>;54 reg = <0x6>;59 reg = <0x7>;[all …]
19 #size-cells = <0>;22 cpu@0 {25 reg = <0x0>;30 reg = <0x1>;35 reg = <0x2>;40 reg = <0x3>;52 reg = <0 0x80002000 0 0x1000>;65 #clock-cells = <0>;71 #clock-cells = <0>;77 #clock-cells = <0>;[all …]
42 #size-cells = <0>;45 cpu0: cpu@0 {48 reg = <0x000>;54 reg = <0x001>;60 reg = <0x100>;66 reg = <0x101>;77 reg = <0 0x80002000 0 0x1000>;90 #clock-cells = <0>;96 #clock-cells = <0>;101 #clock-cells = <0>;[all …]
24 #size-cells = <0>;27 cpu0: cpu@0 {30 reg = <0x0>;38 reg = <0x1>;51 clk20m: oscillator-0 {53 #clock-cells = <0>;60 #clock-cells = <0>;83 reg = <0x10000000 0x1000>;89 reg = <0x10002000 0x1000>;97 reg = <0x10006000 0x1000>;[all …]
25 #size-cells = <0>;28 cpu@0 {31 reg = <0x0>;36 reg = <0x1>;41 reg = <0x2>;46 reg = <0x3>;57 reg = <0 0x80002000 0 0x1000>;64 #clock-cells = <0>;70 #clock-cells = <0>;73 clk26m: oscillator@0 {[all …]
73 #size-cells = <0>;76 cpu0: cpu@0 {79 reg = <0x0>;91 reg = <0x1>;103 reg = <0x2>;115 reg = <0x3>;137 #clock-cells = <0>;142 #clock-cells = <0>;147 clk26m: oscillator-0 {149 #clock-cells = <0>;[all …]
48 #size-cells = <0>;50 cpu0: cpu@0 {54 reg = <0x000>;63 reg = <0x001>;78 reg = <0x002>;93 reg = <0x003>;108 reg = <0x100>;123 reg = <0x101>;138 reg = <0x102>;153 reg = <0x10[all...]
69 #size-cells = <0>;71 cpu0: cpu@0 {74 reg = <0x0 0x0>;89 reg = <0x0 0x1>;111 #clock-cells = <0>;116 #clock-cells = <0>;140 reg = <0 0x4300000[all...]
53 cluster0_opp: opp-table-0 {129 #size-cells = <0>;151 cpu0: cpu@0 {154 reg = <0x000>;169 reg = <0x001>;184 reg = <0x100>;199 reg = <0x101>;214 CPU_SLEEP_0: cpu-sleep-0 {220 arm,psci-suspend-param = <0x0010000>;242 cpu_suspend = <0x8400000[all...]