Searched +full:0 +full:x101c0000 (Results 1 – 7 of 7) sorted by relevance
15 #define RT3883_SDRAM_BASE 0x0000000016 #define RT3883_SYSC_BASE IOMEM(0x10000000)17 #define RT3883_TIMER_BASE 0x1000010018 #define RT3883_INTC_BASE 0x1000020019 #define RT3883_MEMC_BASE 0x1000030020 #define RT3883_UART0_BASE 0x1000050021 #define RT3883_PIO_BASE 0x1000060022 #define RT3883_FSCC_BASE 0x1000070023 #define RT3883_NANDC_BASE 0x1000081024 #define RT3883_I2C_BASE 0x10000900[all …]
42 <7 0>,60 reg = <0x02020000 0x54000>;63 ranges = <0 0x02020000 0x54000>;65 smp-sram@0 {67 reg = <0x0 0x1000>;72 reg = <0x53000 0x1000>;79 reg = <0x101c0000 0xb00>;96 reg = <0x101d0000 0x100>;102 reg = <0x12d10000 0x100>;111 reg = <0x12ca0000 0x1000>;[all …]
72 0: Global Timer Interrupt 076 4: Local Timer Interrupt 0174 reg = <0x10050000 0x800>;194 reg = <0x101C0000 0x800>;215 reg = <0x10050000 0x800>;235 reg = <0x10050000 0x800>;
39 #clock-cells = <0>;45 reg = <0x10090000 0x10000>;56 reg = <0x10104000 0x800>;68 reg = <0x10138000 0x1000>;75 reg = <0x1013c000 0x100>;80 reg = <0x1013c200 0x20>;94 reg = <0x1013c600 0x20>;103 reg = <0x1013d000 0x1000>,104 <0x1013c100 0x0100>;109 reg = <0x10124000 0x400>;[all …]
37 #size-cells = <0>;43 reg = <0xf00>;56 reg = <0xf01>;87 #clock-cells = <0>;92 reg = <0x10080000 0x2000>;95 ranges = <0 0x10080000 0x2000>;97 smp-sram@0 {99 reg = <0x00 0x10>;105 reg = <0x10090000 0x10000>;125 reg = <0x10108000 0x800>;[all …]
44 #size-cells = <0>;50 reg = <0xf00>;60 reg = <0xf01>;68 reg = <0xf02>;76 reg = <0xf03>;82 cpu_opp_table: opp-table-0 {165 #clock-cells = <0>;170 reg = <0x10080000 0x2000>;173 ranges = <0 0x10080000 0x2000>;175 smp-sram@0 {[all …]
38 #clock-cells = <0>;44 #size-cells = <0>;87 cpu0: cpu@0 {90 reg = <0x0 0x0>;92 i-cache-size = <0x10000>;95 d-cache-size = <0x10000>;104 reg = <0x0 0x100>;106 i-cache-size = <0x10000>;109 d-cache-size = <0x10000>;118 reg = <0x0 0x200>;[all …]