Searched +full:0 +full:x101c0000 (Results 1 – 12 of 12) sorted by relevance
10 cpu@0 {16 #address-cells = <0>;24 reg = <0x10000000 0x200000>;25 ranges = <0x0 0x10000000 0x1FFFFF>;30 sysc: syscon@0 {32 reg = <0x0 0x100>;39 reg = <0x200 0x100>;50 reg = <0x300 0x100>;55 reg = <0xc00 0x100>;68 reg = <0x101c0000 40000>;
11 #size-cells = <0>;13 cpu@0 {16 reg = <0>;21 #address-cells = <0>;29 reg = <0x10000000 0x200000>;30 ranges = <0x0 0x10000000 0x1FFFFF>;35 sysc: syscon@0 {37 reg = <0x0 0x60>;44 reg = <0x60 0x8>;46 #size-cells = <0>;[all …]
42 <7 0>,60 reg = <0x02020000 0x54000>;63 ranges = <0 0x02020000 0x54000>;65 smp-sram@0 {67 reg = <0x0 0x1000>;72 reg = <0x53000 0x1000>;79 reg = <0x101c0000 0xb00>;96 reg = <0x101d0000 0x100>;102 reg = <0x12d10000 0x100>;111 reg = <0x12ca0000 0x1000>;[all …]
47 #size-cells = <0>;60 cpu0: cpu@0 {63 reg = <0>;80 cpu0_opp_table: opp-table-0 {176 reg = <0x02020000 0x30000>;179 ranges = <0 0x02020000 0x30000>;181 smp-sram@0 {183 reg = <0x0 0x1000>;188 reg = <0x2f000 0x1000>;194 reg = <0x10044000 0x20>;[all …]
71 0: Global Timer Interrupt 075 4: Local Timer Interrupt 0172 reg = <0x10050000 0x800>;192 reg = <0x101C0000 0x800>;213 reg = <0x10050000 0x800>;233 reg = <0x10050000 0x800>;
39 #clock-cells = <0>;45 reg = <0x10090000 0x10000>;56 reg = <0x10104000 0x800>;68 reg = <0x10138000 0x1000>;75 reg = <0x1013c000 0x100>;80 reg = <0x1013c200 0x20>;94 reg = <0x1013c600 0x20>;103 reg = <0x1013d000 0x1000>,104 <0x1013c100 0x0100>;109 reg = <0x10124000 0x400>;[all …]
37 #size-cells = <0>;43 reg = <0xf00>;56 reg = <0xf01>;87 #clock-cells = <0>;92 reg = <0x10080000 0x2000>;95 ranges = <0 0x10080000 0x2000>;97 smp-sram@0 {99 reg = <0x00 0x10>;105 reg = <0x10090000 0x10000>;125 reg = <0x10108000 0x800>;[all …]
44 #size-cells = <0>;50 reg = <0xf00>;60 reg = <0xf01>;68 reg = <0xf02>;76 reg = <0xf03>;82 cpu_opp_table: opp-table-0 {165 #clock-cells = <0>;170 reg = <0x10080000 0x2000>;173 ranges = <0 0x10080000 0x2000>;175 smp-sram@0 {[all …]
59 * special values defined in the document, they are of the form 0xLTTTNNNN,63 * 0: static configuration100 #define TLV_TAG_END (0xEEEEEEEE)105 #define TLV_TAG_SKIP (0x00000000)106 #define TLV_TAG_INVALID (0xFFFFFFFF)111 * 0.114 #define TLV_TAG_PARTITION_HEADER (0xEF10DA7A)120 /* 0 indicates the default segment (always located at offset 0), while other values122 * The default segment may also have preset > 0, which means that it is a preset123 * selected through an RFID command and copied by FW to the location at offset 0. */[all …]
38 #clock-cells = <0>;44 #size-cells = <0>;87 cpu0: cpu@0 {90 reg = <0x0 0x0>;92 i-cache-size = <0x10000>;95 d-cache-size = <0x10000>;104 reg = <0x0 0x100>;106 i-cache-size = <0x10000>;109 d-cache-size = <0x10000>;118 reg = <0x0 0x200>;[all …]
48 #clock-cells = <0>;53 #size-cells = <0>;91 reg = <0x100>;96 i-cache-size = <0x8000>;99 d-cache-size = <0x8000>;109 reg = <0x101>;112 i-cache-size = <0x8000>;115 d-cache-size = <0x8000>;125 reg = <0x102>;128 i-cache-size = <0x8000>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]