Searched +full:0 +full:x10180000 (Results 1 – 8 of 8) sorted by relevance
33 port@0:56 reg = <0x10180000 0x8000>;65 #size-cells = <0>;66 hdmi_in: port@0 {67 reg = <0>;
197 reg = <0x10180000 0x40000>;
13 #size-cells = <0>;15 cpu0: cpu@0 {17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";18 reg = <0>;26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";35 #address-cells = <0>;43 reg = <0x10001000 0x50>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x10000000 0x100>;[all …]
39 #clock-cells = <0>;45 reg = <0x10090000 0x10000>;56 reg = <0x10104000 0x800>;68 reg = <0x10138000 0x1000>;75 reg = <0x1013c000 0x100>;80 reg = <0x1013c200 0x20>;94 reg = <0x1013c600 0x20>;103 reg = <0x1013d000 0x1000>,104 <0x1013c100 0x0100>;109 reg = <0x10124000 0x400>;[all …]
37 #size-cells = <0>;43 reg = <0xf00>;56 reg = <0xf01>;87 #clock-cells = <0>;92 reg = <0x10080000 0x2000>;95 ranges = <0 0x10080000 0x2000>;97 smp-sram@0 {99 reg = <0x00 0x10>;105 reg = <0x10090000 0x10000>;125 reg = <0x10108000 0x800>;[all …]
44 #size-cells = <0>;50 reg = <0xf00>;61 reg = <0xf01>;69 reg = <0xf02>;77 reg = <0xf03>;83 cpu_opp_table: opp-table-0 {159 #clock-cells = <0>;164 reg = <0x10080000 0x2000>;167 ranges = <0 0x10080000 0x2000>;169 smp-sram@0 {[all …]
59 * special values defined in the document, they are of the form 0xLTTTNNNN,63 * 0: static configuration100 #define TLV_TAG_END (0xEEEEEEEE)105 #define TLV_TAG_SKIP (0x00000000)106 #define TLV_TAG_INVALID (0xFFFFFFFF)111 * 0.114 #define TLV_TAG_PARTITION_HEADER (0xEF10DA7A)120 /* 0 indicates the default segment (always located at offset 0), while other values122 * The default segment may also have preset > 0, which means that it is a preset123 * selected through an RFID command and copied by FW to the location at offset 0. */[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]