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/linux/Documentation/devicetree/bindings/thermal/
H A Dsamsung,exynos-thermal.yaml24 # For TMU channel 0, 1 on Exynos5420:
59 TRIMINFO at 0x1006c000 contains data for TMU channel 3
60 TRIMINFO at 0x100a0000 contains data for TMU channel 4
61 TRIMINFO at 0x10068000 contains data for TMU channel 2
65 const: 0
151 reg = <0x100C0000 0x100>;
154 #thermal-sensor-cells = <0>;
165 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
167 #thermal-sensor-cells = <0>;
178 reg = <0x10060000 0x200>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4x12.dtsi70 #interconnect-cells = <0>;
80 #interconnect-cells = <0>;
120 #interconnect-cells = <0>;
211 reg = <0x11400000 0x1000>;
217 reg = <0x11000000 0x1000>;
229 reg = <0x03860000 0x1000>;
231 interrupts = <10 0>;
236 reg = <0x106e0000 0x1000>;
242 reg = <0x02020000 0x40000>;
245 ranges = <0 0x02020000 0x40000>;
[all …]
H A Dexynos3250.dtsi199 #size-cells = <0>;
212 cpu0: cpu@0 {
215 reg = <0>;
259 xusbxti: clock-0 {
261 clock-frequency = <0>;
262 #clock-cells = <0>;
268 clock-frequency = <0>;
269 #clock-cells = <0>;
275 clock-frequency = <0>;
276 #clock-cells = <0>;
[all …]
H A Dexynos4.dtsi68 reg = <0x03810000 0x0c>;
79 reg = <0x03830000 0x100>;
88 samsung,idma-addr = <0x03000000>;
95 reg = <0x10000000 0x100>;
100 reg = <0x10500000 0x2000>;
105 reg = <0x12570000 0x14>;
110 reg = <0x10023c40 0x20>;
111 #power-domain-cells = <0>;
117 reg = <0x10023c60 0x20>;
118 #power-domain-cells = <0>;
[all …]
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_main.c55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]
/linux/arch/arm64/boot/dts/tesla/
H A Dfsd.dtsi39 #size-cells = <0>;
88 /* Cluster 0 */
89 cpucl0_0: cpu@0 {
92 reg = <0x0 0x000>;
96 i-cache-size = <0xc000>;
99 d-cache-size = <0x8000>;
108 reg = <0x0 0x001>;
112 i-cache-size = <0xc000>;
115 d-cache-size = <0x8000>;
124 reg = <0x0 0x002>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk322x.dtsi30 #size-cells = <0>;
35 reg = <0xf00>;
47 reg = <0xf01>;
57 reg = <0xf02>;
67 reg = <0xf03>;
75 cpu0_opp_table: opp-table-0 {
131 #clock-cells = <0>;
141 reg = <0x100b0000 0x4000>;
148 pinctrl-0 = <&i2s1_bus>;
154 reg = <0x100c0000 0x4000>;
[all …]