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Searched +full:0 +full:x10070000 (Results 1 – 13 of 13) sorted by relevance

/linux/Documentation/devicetree/bindings/rtc/
H A Ds3c-rtc.yaml57 reg = <0x10070000 0x100>;
58 interrupts = <0 44 4>, <0 45 4>;
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dingenic,adc.yaml84 reg = <0x10070000 0x30>;
/linux/arch/mips/boot/dts/ingenic/
H A Djz4725b.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
H A Djz4740.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
H A Djz4770.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x40>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
58 ranges = <0x0 0x10000000 0x100>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi21 #size-cells = <0>;
22 cpu0: cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
58 #clock-cells = <0>;
73 reg = <0 0x43000000 0 0x30000>;
79 reg = <0 0x4fc00000 0 0x00100000>;
83 reg = <0 0x4fd00000 0 0x40000>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos3250.dtsi199 #size-cells = <0>;
212 cpu0: cpu@0 {
215 reg = <0>;
259 xusbxti: clock-0 {
261 clock-frequency = <0>;
262 #clock-cells = <0>;
268 clock-frequency = <0>;
269 #clock-cells = <0>;
275 clock-frequency = <0>;
276 #clock-cells = <0>;
[all …]
H A Dexynos4.dtsi68 reg = <0x03810000 0x0c>;
79 reg = <0x03830000 0x100>;
88 samsung,idma-addr = <0x03000000>;
95 reg = <0x10000000 0x100>;
100 reg = <0x10500000 0x2000>;
105 reg = <0x12570000 0x14>;
110 reg = <0x10023c40 0x20>;
111 #power-domain-cells = <0>;
117 reg = <0x10023c60 0x20>;
118 #power-domain-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043.dtsi17 #clock-cells = <0>;
19 clock-frequency = <0>;
24 #clock-cells = <0>;
26 clock-frequency = <0>;
32 #clock-cells = <0>;
33 clock-frequency = <0>;
39 #clock-cells = <0>;
41 clock-frequency = <0>;
44 cluster0_opp: opp-table-0 {
80 reg = <0 0x10001200 0 0xb00>;
[all …]
H A Dr9a07g044.dtsi19 #clock-cells = <0>;
21 clock-frequency = <0>;
26 #clock-cells = <0>;
28 clock-frequency = <0>;
34 #clock-cells = <0>;
35 clock-frequency = <0>;
41 #clock-cells = <0>;
43 clock-frequency = <0>;
46 cluster0_opp: opp-table-0 {
75 #size-cells = <0>;
[all …]
H A Dr9a07g054.dtsi19 #clock-cells = <0>;
21 clock-frequency = <0>;
26 #clock-cells = <0>;
28 clock-frequency = <0>;
34 #clock-cells = <0>;
35 clock-frequency = <0>;
41 #clock-cells = <0>;
43 clock-frequency = <0>;
46 cluster0_opp: opp-table-0 {
75 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynosautov920.dtsi38 #clock-cells = <0>;
44 #size-cells = <0>;
87 cpu0: cpu@0 {
90 reg = <0x0 0x0>;
92 i-cache-size = <0x10000>;
95 d-cache-size = <0x10000>;
104 reg = <0x0 0x100>;
106 i-cache-size = <0x10000>;
109 d-cache-size = <0x10000>;
118 reg = <0x0 0x200>;
[all …]
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101.dtsi35 #size-cells = <0>;
72 cpu0: cpu@0 {
75 reg = <0x0000>;
87 reg = <0x0100>;
99 reg = <0x0200>;
111 reg = <0x0300>;
123 reg = <0x0400>;
135 reg = <0x0500>;
147 reg = <0x0600>;
159 reg = <0x0700>;
[all …]