Searched +full:0 +full:x10021 (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | riscv,pmu.yaml | 78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
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| /linux/drivers/gpu/drm/amd/include/asic_reg/pcie/ |
| H A D | pcie_6_1_0_offset.h | 28 // base address: 0x11a08000
29 …O_HWDID 0x2270800
30 …e regDXIO_HWDID_BASE_IDX 0
31 …O_LINKAGE_LANEGRP 0x2270802
32 …e regDXIO_LINKAGE_LANEGRP_BASE_IDX 0
33 …O_LINKAGE_KPDMX 0x2270803
34 …e regDXIO_LINKAGE_KPDMX_BASE_IDX 0
35 …O_LINKAGE_KPMX 0x2270804
36 …O_LINKAGE_KPFIFO 0x2270805
37 …O_LINKAGE_KPNP 0x2270806
[all …]
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| /linux/drivers/scsi/ |
| H A D | zorro_esp.c | 60 unsigned char dma_addr; /* DMA address [0x0000] */
61 unsigned char dmapad2[0x7fff];
62 unsigned char dma_latch; /* DMA latch [0x8000] */
68 unsigned char dma_addr; /* DMA address [0x0000] */
69 unsigned char dmapad2[0xf];
70 unsigned char dma_latch; /* DMA latch [0x0010] */
76 unsigned char dma_led_ctrl; /* DMA led control [0x000] */
77 unsigned char dmapad1[0x0f];
78 unsigned char dma_addr0; /* DMA address (MSB) [0x010] */
79 unsigned char dmapad2[0x03];
[all …]
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| /linux/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | cudbg_lib.c | 20 {0x7e40, 0x7e44, 0x020, 28}, /* t6_tp_pio_regs_20_to_3b */
21 {0x7e40, 0x7e44, 0x040, 10}, /* t6_tp_pio_regs_40_to_49 */
22 {0x7e40, 0x7e44, 0x050, 10}, /* t6_tp_pio_regs_50_to_59 */
23 {0x7e40, 0x7e44, 0x060, 14}, /* t6_tp_pio_regs_60_to_6d */
24 {0x7e40, 0x7e44, 0x06F, 1}, /* t6_tp_pio_regs_6f */
25 {0x7e40, 0x7e44, 0x070, 6}, /* t6_tp_pio_regs_70_to_75 */
26 {0x7e40, 0x7e44, 0x130, 18}, /* t6_tp_pio_regs_130_to_141 */
27 {0x7e40, 0x7e44, 0x145, 19}, /* t6_tp_pio_regs_145_to_157 */
28 {0x7e40, 0x7e44, 0x160, 1}, /* t6_tp_pio_regs_160 */
29 {0x7e40, 0x7e44, 0x230, 25}, /* t6_tp_pio_regs_230_to_248 */
[all …]
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