Searched +full:0 +full:x10013000 (Results 1 – 14 of 14) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | mtk-cir.txt | 23 reg = <0 0x10013000 0 0x1000>;
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H A D | mediatek,mt7622-cir.yaml | 50 reg = <0x10013000 0x1000>;
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
H A D | mediatek,cec.yaml | 47 reg = <0x10013000 0xbc>;
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H A D | mediatek,hdmi.txt | 19 configuration registers. For mt8173 this must be offset 0x900 into the 20 MMSYS_CONFIG region: <&mmsys 0x900>. 23 - port@0: The input port in the ports node should be connected to a DPI output 62 reg = <0 0x10013000 0 0xbc>; 69 reg = <0 0x10209100 0 0x24>; 73 mediatek,ibias = <0xa>; 74 mediatek,ibias_up = <0x1c>; 75 #clock-cells = <0>; 76 #phy-cells = <0>; 81 reg = <0 0x11012000 0 0x1c>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-slave-mt27xx.txt | 27 reg = <0 0x10013000 0 0x100>;
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H A D | mediatek,spi-slave-mt27xx.yaml | 52 reg = <0x10013000 0x100>;
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/freebsd/sys/contrib/device-tree/src/arm/arm/ |
H A D | arm-realview-eb.dtsi | 43 /* 128 MiB memory @ 0x0 */ 44 reg = <0x00000000 0x08000000>; 57 #clock-cells = <0>; 63 #clock-cells = <0>; 72 #clock-cells = <0>; 74 clock-frequency = <0>; 80 reg = <0x40000000 0x04000000>; 90 reg = <0x44000000 0x04000000>; 100 reg = <0x4e000000 0x10000>; 110 reg = <0x4f000000 0x20000>; [all …]
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H A D | arm-realview-pbx.dtsi | 44 /* 128 MiB memory @ 0x0 */ 45 reg = <0x00000000 0x08000000>; 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #clock-cells = <0>; 87 #clock-cells = <0>; 89 clock-frequency = <0>; 95 reg = <0x40000000 0x04000000>; 105 reg = <0x44000000 0x04000000>; 115 reg = <0x4e000000 0x10000>; [all …]
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H A D | arm-realview-pb11mp.dts | 45 * The PB11MPCore has 512 MiB memory @ 0x70000000 46 * and the first 256 are also remapped @ 0x00000000 48 reg = <0x70000000 0x20000000>; 53 #size-cells = <0>; 56 MP11_0: cpu@0 { 59 reg = <0>; 91 reg = <0x1f001000 0x1000>, 92 <0x1f000100 0x100>; 97 reg = <0x1f002000 0x1000>; 99 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx27.dtsi | 47 reg = <0x10040000 0x1000>; 53 #clock-cells = <0>; 59 #size-cells = <0>; 62 cpu: cpu@0 { 64 reg = <0>; 88 reg = <0x10000000 0x20000>; 93 reg = <0x10001000 0x1000>; 104 reg = <0x10002000 0x1000>; 111 reg = <0x10003000 0x1000>; 120 reg = <0x10004000 0x1000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | qcs404.dtsi | 24 #clock-cells = <0>; 30 #clock-cells = <0>; 37 #size-cells = <0>; 42 reg = <0x100>; 56 reg = <0x101>; 70 reg = <0x102>; 84 reg = <0x103>; 104 CPU_SLEEP_0: cpu-sleep-0 { 107 arm,psci-suspend-param = <0x40000003>; 161 reg = <0 0x80000000 0 0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt2712e.dtsi | 22 cluster0_opp: opp-table-0 { 66 #size-cells = <0>; 85 cpu0: cpu@0 { 88 reg = <0x000>; 100 reg = <0x001>; 113 reg = <0x200>; 126 CPU_SLEEP_0: cpu-sleep-0 { 132 arm,psci-suspend-param = <0x0010000>; 135 CLUSTER_SLEEP_0: cluster-sleep-0 { 141 arm,psci-suspend-param = <0x1010000>; [all …]
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H A D | mt8173.dtsi | 53 cluster0_opp: opp-table-0 { 129 #size-cells = <0>; 151 cpu0: cpu@0 { 154 reg = <0x000>; 169 reg = <0x001>; 184 reg = <0x100>; 199 reg = <0x101>; 214 CPU_SLEEP_0: cpu-sleep-0 { 220 arm,psci-suspend-param = <0x0010000>; 242 cpu_suspend = <0x84000001>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7623.dtsi | 73 #size-cells = <0>; 76 cpu0: cpu@0 { 79 reg = <0x0>; 91 reg = <0x1>; 103 reg = <0x2>; 115 reg = <0x3>; 137 #clock-cells = <0>; 142 #clock-cells = <0>; 147 clk26m: oscillator-0 { 149 #clock-cells = <0>; [all …]
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