Searched +full:0 +full:x10011 (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | riscv,pmu.yaml | 78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
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| /linux/drivers/perf/hisilicon/ |
| H A D | hisi_pcie_pmu.c | 24 #define HISI_PCIE_GLOBAL_CTRL 0x00
25 #define HISI_PCIE_EVENT_CTRL 0x010
26 #define HISI_PCIE_CNT 0x090
27 #define HISI_PCIE_EXT_CNT 0x110
28 #define HISI_PCIE_INT_STAT 0x150
29 #define HISI_PCIE_INT_MASK 0x154
30 #define HISI_PCIE_REG_BDF 0xfe0
31 #define HISI_PCIE_REG_VERSION 0xfe4
32 #define HISI_PCIE_REG_INFO 0xfe8
35 #define HISI_PCIE_GLOBAL_EN 0x01
[all …]
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| /linux/arch/riscv/boot/dts/sophgo/ |
| H A D | sg2044-cpus.dtsi | 12 #size-cells = <0>;
15 cpu0: cpu@0 {
17 reg = <0>;
2611 l2_cache0: cache-controller-0 {
2784 <0x00003 0x00000000 0x00000010>,
2785 <0x00004 0x00000000 0x00000011>,
2786 <0x00005 0x00000000 0x00000007>,
2787 <0x00006 0x00000000 0x00000006>,
2788 <0x00008 0x00000000 0x00000027>,
2789 <0x00009 0x00000000 0x00000028>,
[all …]
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