Searched +full:0 +full:x10011 (Results 1 – 3 of 3) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/perf/ |
| H A D | riscv,pmu.yaml | 78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x0000000
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| /freebsd/sys/contrib/device-tree/src/riscv/thead/ |
| H A D | th1520.dtsi | 17 #size-cells = <0>;
20 c910_0: cpu@0 {
27 reg = <0>;
129 <0x00003 0x00003 0x0007fff8>,
130 <0x00004 0x00004 0x0007fff8>,
131 <0x00005 0x00005 0x0007fff8>,
132 <0x00006 0x00006 0x0007fff8>,
133 <0x00007 0x00007 0x0007fff8>,
134 <0x00008 0x00008 0x0007fff8>,
135 <0x00009 0x00009 0x0007fff8>,
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| /freebsd/sys/dev/cxgbe/common/ |
| H A D | t4_regs.h | 36 #define MYPF_BASE 0x1b000
39 #define PF0_BASE 0x1e000
42 #define PF1_BASE 0x1e400
45 #define PF2_BASE 0x1e800
48 #define PF3_BASE 0x1ec00
51 #define PF4_BASE 0x1f000
54 #define PF5_BASE 0x1f400
57 #define PF6_BASE 0x1f800
60 #define PF7_BASE 0x1fc00
63 #define PF_STRIDE 0x400
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