Searched +full:0 +full:x100100 (Results 1 – 5 of 5) sorted by relevance
2 * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]39 reg = <0x100300 0x4>;40 ranges = <0x0 0x100100 0x200>;41 cell-index = <0>;42 dma-channel@0 {44 reg = <0x0 0x80>;45 cell-index = <0>;46 interrupts = <28 2 0 0>;50 reg = <0x80 0x80>;52 interrupts = <29 2 0 0>;[all …]
2 * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]39 reg = <0x100300 0x4>,40 <0x100600 0x4>;41 ranges = <0x0 0x100100 0x500>;42 dma-channel@0 {44 reg = <0x0 0x80>;45 interrupts = <28 2 0 0>;49 reg = <0x80 0x80>;50 interrupts = <29 2 0 0>;54 reg = <0x100 0x80>;[all …]
22 #define mmMME4_RTR_HBW_RD_RQ_E_ARB 0x10010024 #define mmMME4_RTR_HBW_RD_RQ_W_ARB 0x10010426 #define mmMME4_RTR_HBW_RD_RQ_N_ARB 0x10010828 #define mmMME4_RTR_HBW_RD_RQ_S_ARB 0x10010C30 #define mmMME4_RTR_HBW_RD_RQ_L_ARB 0x10011032 #define mmMME4_RTR_HBW_E_ARB_MAX 0x10012034 #define mmMME4_RTR_HBW_W_ARB_MAX 0x10012436 #define mmMME4_RTR_HBW_N_ARB_MAX 0x10012838 #define mmMME4_RTR_HBW_S_ARB_MAX 0x10012C40 #define mmMME4_RTR_HBW_L_ARB_MAX 0x100130[all …]
25 if (timeout < 0) in snd_pmac_burgundy_busy_wait() 36 if (timeout < 0) in snd_pmac_burgundy_extend_wait() 41 if (timeout < 0) in snd_pmac_burgundy_extend_wait() 48 out_le32(&chip->awacs->codec_ctrl, addr + 0x200c00 + (val & 0xff)); in snd_pmac_burgundy_wcw() 50 out_le32(&chip->awacs->codec_ctrl, addr + 0x200d00 +((val>>8) & 0xff)); in snd_pmac_burgundy_wcw() 52 out_le32(&chip->awacs->codec_ctrl, addr + 0x200e00 +((val>>16) & 0xff)); in snd_pmac_burgundy_wcw() 54 out_le32(&chip->awacs->codec_ctrl, addr + 0x200f0 in snd_pmac_burgundy_wcw() [all...]
13 #define RISC_CNT_INC 0x0001000014 #define RISC_CNT_RESET 0x0003000015 #define RISC_IRQ1 0x0100000016 #define RISC_IRQ2 0x0200000017 #define RISC_EOL 0x0400000018 #define RISC_SOL 0x0800000019 #define RISC_WRITE 0x1000000020 #define RISC_SKIP 0x2000000021 #define RISC_JUMP 0x7000000022 #define RISC_SYNC 0x80000000[all …]