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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-bcm63xx.txt10 - #size-cells: <0>, also as required by generic SPI binding.
22 reg = <0x10000800 0x70c>;
32 #size-cells = <0>;
/freebsd/sys/contrib/device-tree/src/mips/brcm/
H A Dbcm6362.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
42 #clock-cells = <0>;
58 #address-cells = <0>;
74 reg = <0x10000004 0x4>;
80 reg = <0x10000008 0x4>;
85 offset = <0x0>;
86 mask = <0x1>;
[all …]
H A Dbcm6328.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
41 #clock-cells = <0>;
55 #address-cells = <0>;
71 reg = <0x10000004 0x4>;
77 reg = <0x10000010 0x4>;
83 reg = <0x10000020 0x10>,
84 <0x10000030 0x10>;
[all …]
H A Dbcm6368.dtsi13 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
33 #clock-cells = <0>;
48 #address-cells = <0>;
64 reg = <0x10000004 0x4>;
70 reg = <0x10000008 0x4>;
75 offset = <0x0>;
76 mask = <0x1>;
82 reg = <0x10000010 0x4>;
[all …]
H A Dbcm63268.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
42 #clock-cells = <0>;
58 #address-cells = <0>;
74 reg = <0x10000004 0x4>;
80 reg = <0x10000008 0x4>;
85 offset = <0x0>;
86 mask = <0x1>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-bcm6328.txt15 with 0 meaning hardware control enabled and 1 hardware control disabled. This
26 - #size-cells : must be 0.
44 - reg : LED pin number (only LEDs 0 to 23 are valid).
61 these LEDs. Only valid for LEDs 0 to 7, where LED signals 0 to 3 may
62 be muxed to LEDs 0 to 3, and signals 4 to 7 may be muxed to LEDs
67 these LEDs. Only valid for LEDs 0 to 7, where LED signals 0 to 3 may
68 be muxed to LEDs 0 to 3, and signals 4 to 7 may be muxed to LEDs
77 #size-cells = <0>;
78 reg = <0x10000800 0x24>;
118 #size-cells = <0>;
[all …]
H A Dleds-bcm6328.yaml26 with 0 meaning hardware control enabled and 1 hardware control disabled. This
67 const: 0
79 description: LED pin number (only LEDs 0 to 23 are valid).
91 signals can get muxed into these LEDs. Only valid for LEDs 0 to 7,
92 where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and signals 4 to
102 hardware signals can get muxed into these LEDs. Only valid for LEDs 0
103 to 7, where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and
125 #size-cells = <0>;
126 reg = <0x10000800 0x24>;
172 #size-cells = <0>;
[all …]
/freebsd/crypto/krb5/src/lib/crypto/builtin/des/
H A Df_sched.c44 0x00000000, 0x00000010, 0x00001000, 0x00001010,
45 0x00100000, 0x00100010, 0x00101000, 0x00101010
49 0x00000000, 0x00100000, 0x00001000, 0x00101000,
50 0x00000010, 0x00100010, 0x00001010, 0x00101010,
51 0x00000001, 0x00100001, 0x00001001, 0x00101001,
52 0x00000011, 0x00100011, 0x00001011, 0x00101011
56 0x00000000, 0x00000001, 0x00000100, 0x00000101,
57 0x00010000, 0x00010001, 0x00010100, 0x00010101,
58 0x01000000, 0x01000001, 0x01000100, 0x01000101,
59 0x01010000, 0x01010001, 0x01010100, 0x01010101
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Drtw8852a_table.c10 {0xF0FF0001, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03500FF, 0x00000002},
13 {0xF03200FF, 0x00000003},
14 {0xF03400FF, 0x0000000
[all...]