Searched +full:0 +full:x10000200 (Results 1 – 7 of 7) sorted by relevance
/freebsd/sys/contrib/device-tree/src/mips/brcm/ |
H A D | bcm6362.dtsi | 14 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 34 #clock-cells = <0>; 42 #clock-cells = <0>; 58 #address-cells = <0>; 74 reg = <0x10000004 0x4>; 80 reg = <0x10000008 0x4>; 85 offset = <0x0>; 86 mask = <0x1>; [all …]
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H A D | bcm6328.dtsi | 14 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 34 #clock-cells = <0>; 41 #clock-cells = <0>; 55 #address-cells = <0>; 71 reg = <0x10000004 0x4>; 77 reg = <0x10000010 0x4>; 83 reg = <0x10000020 0x10>, 84 <0x10000030 0x10>; [all …]
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H A D | bcm6368.dtsi | 13 #size-cells = <0>; 17 cpu@0 { 20 reg = <0>; 33 #clock-cells = <0>; 48 #address-cells = <0>; 64 reg = <0x10000004 0x4>; 70 reg = <0x10000008 0x4>; 75 offset = <0x0>; 76 mask = <0x1>; 82 reg = <0x10000010 0x4>; [all …]
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H A D | bcm63268.dtsi | 14 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 34 #clock-cells = <0>; 42 #clock-cells = <0>; 58 #address-cells = <0>; 74 reg = <0x10000004 0x4>; 80 reg = <0x10000008 0x4>; 85 offset = <0x0>; 86 mask = <0x1>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | brcm,brcmnand.txt | 21 string, like "brcm,brcmnand-v7.0" 25 brcm,brcmnand-v4.0 26 brcm,brcmnand-v5.0 27 brcm,brcmnand-v6.0 30 brcm,brcmnand-v7.0 49 - #size-cells : <0> 56 v7.0. Use this property to describe the rare 104 number (e.g., 0, 1, 2, etc.) 132 compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand"; 133 reg = <0xF0442800 0x600>, [all …]
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H A D | brcm,brcmnand.yaml | 48 - brcm,brcmnand-v4.0 49 - brcm,brcmnand-v5.0 50 - brcm,brcmnand-v6.0 53 - brcm,brcmnand-v7.0 62 - brcm,brcmnand-v7.0 74 - const: brcm,brcmnand-v4.0 112 v7.0. Use this property to describe the rare 231 compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand"; 232 reg = <0xf0442800 0x600>, 233 <0xf0443000 0x100>; [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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