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Searched +full:0 +full:x10000010 (Results 1 – 11 of 11) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dbrcm,bcm6345-reset.yaml35 reg = <0x10000010 0x4>;
/freebsd/sys/contrib/device-tree/src/mips/brcm/
H A Dbcm6362.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
42 #clock-cells = <0>;
58 #address-cells = <0>;
74 reg = <0x10000004 0x4>;
80 reg = <0x10000008 0x4>;
85 offset = <0x0>;
86 mask = <0x1>;
[all …]
H A Dbcm6328.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
41 #clock-cells = <0>;
55 #address-cells = <0>;
71 reg = <0x10000004 0x4>;
77 reg = <0x10000010 0x4>;
83 reg = <0x10000020 0x10>,
84 <0x10000030 0x10>;
[all …]
H A Dbcm6368.dtsi13 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
33 #clock-cells = <0>;
48 #address-cells = <0>;
64 reg = <0x10000004 0x4>;
70 reg = <0x10000008 0x4>;
75 offset = <0x0>;
76 mask = <0x1>;
82 reg = <0x10000010 0x4>;
[all …]
H A Dbcm63268.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
42 #clock-cells = <0>;
58 #address-cells = <0>;
74 reg = <0x10000004 0x4>;
80 reg = <0x10000008 0x4>;
85 offset = <0x0>;
86 mask = <0x1>;
[all …]
/freebsd/tools/test/stress2/misc/
H A Dsyzkaller16.sh4 # cpuid = 10; apic id = 0a
5 # instruction pointer = 0x20:0xffffffff80db1fd9
6 # stack pointer = 0x0:0xfffffe00e2240660
7 # frame pointer = 0x0:0xfffffe00e2240830
8 # code segment = base 0x0, limit 0xfffff, type 0x1b
9 # = DPL 0, pres 1, long 1, def32 0, gran 1
10 # processor eflags = interrupt enabled, resume, IOPL = 0
17 # db_trace_self_wrapper() at db_trace_self_wrapper+0x2b/frame 0xfffffe00e2240370
18 # vpanic() at vpanic+0x182/frame 0xfffffe00e22403c0
19 # panic() at panic+0x43/frame 0xfffffe00e2240420
[all …]
/freebsd/crypto/krb5/src/lib/crypto/builtin/des/
H A Df_tables.c65 * ((left & 0x55555555) << 1) | (right & 0x55555555) for left half
66 * (left & 0xaaaaaaaa) | ((right & 0xaaaaaaaa) >> 1) for right half
76 0x00000000, 0x00000010, 0x00000001, 0x00000011,
77 0x00001000, 0x00001010, 0x00001001, 0x00001011,
78 0x00000100, 0x00000110, 0x00000101, 0x00000111,
79 0x00001100, 0x00001110, 0x00001101, 0x00001111,
80 0x00100000, 0x00100010, 0x00100001, 0x00100011,
81 0x00101000, 0x00101010, 0x00101001, 0x00101011,
82 0x00100100, 0x00100110, 0x00100101, 0x00100111,
83 0x00101100, 0x00101110, 0x00101101, 0x00101111,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/cpu/
H A Didle-states.yaml102 between 0 and infinite time, until a wake-up event occurs.
127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
167 0| 1 time(ms)
172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope
444 #size-cells = <0>;
447 cpu@0 {
450 reg = <0x0 0x0>;
459 reg = <0x0 0x1>;
468 reg = <0x0 0x100>;
477 reg = <0x0 0x101>;
[all …]
/freebsd/sys/dev/ti/
H A Dti_fw2.h6 static int tigon2FwReleaseMajor = 0xc;
7 static int tigon2FwReleaseMinor = 0x4;
8 static int tigon2FwReleaseFix = 0xb;
9 static u_int32_t tigon2FwStartAddr = 0x00004000;
10 static u_int32_t tigon2FwTextAddr = 0x00004000;
11 int tigon2FwTextLen = 0x132f8;
12 static u_int32_t tigon2FwRodataAddr = 0x000172f8;
13 int tigon2FwRodataLen = 0x10da;
14 static u_int32_t tigon2FwDataAddr = 0x000185c0;
15 int tigon2FwDataLen = 0x17c;
[all …]
/freebsd/sys/dev/ispfw/
H A Dasm_2800.h38 0x0501f078, 0x00124000, 0x00100000, 0x00017380,
39 0x00000009, 0x0000000c, 0x00000001, 0x785ad0d5,
40 0x00000080, 0x0001f626, 0x20434f50, 0x59524947,
41 0x48542032, 0x30323320, 0x514c4f47, 0x49432043,
42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350,
43 0x32387878, 0x20466972, 0x6d776172, 0x65202020,
44 0x56657273, 0x696f6e20, 0x2020392e, 0x31322e30,
45 0x31202024, 0x00000000, 0x00000092, 0x00000000,
46 0x00000000, 0x00000000, 0x00000000, 0x00100000,
47 0x00100000, 0x00017380, 0xffffffff, 0x00124004,
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]