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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,qcs8300-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$"
105 reg = <0x0f100000 0x300000>;
109 gpio-ranges = <&tlmm 0 0 133>;
H A Dqcom,sm8250-pinctrl.yaml63 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
109 reg = <0x0f100000 0x300000>,
110 <0x0f500000 0x300000>,
111 <0x0f900000 0x300000>;
118 gpio-ranges = <&tlmm 0 0 181>; /* GPIOs + ufs_reset */
H A Dqcom,sdx75-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$"
104 reg = <0x0f100000 0x300000>;
107 gpio-ranges = <&tlmm 0 0 133>;
H A Dqcom,sdx55-pinctrl.yaml53 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"
106 reg = <0x0f100000 0x300000>;
109 gpio-ranges = <&tlmm 0 0 108>;
H A Dqcom,sm8750-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9]|21[0-4])$"
111 reg = <0x0f100000 0x300000>;
114 gpio-ranges = <&tlmm 0 0 216>;
H A Dqcom,sm8650-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
114 reg = <0x0f100000 0x300000>;
117 gpio-ranges = <&tlmm 0 0 211>;
H A Dqcom,sm8450-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
107 reg = <0x0f100000 0x300000>;
110 gpio-ranges = <&tlmm 0 0 211>;
H A Dqcom,sm8350-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-2])$"
108 reg = <0x0f100000 0x300000>;
114 gpio-ranges = <&tlmm 0 0 204>; /* GPIOs + ufs_reset */
H A Dqcom,sm8550-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
121 reg = <0x0f100000 0x300000>;
124 gpio-ranges = <&tlmm 0 0 211>;
H A Dqcom,sar2130p-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
111 reg = <0x0f100000 0x300000>;
114 gpio-ranges = <&tlmm 0 0 156>;
H A Dqcom,sc8280xp-tlmm.yaml55 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$"
110 reg = <0x0f100000 0x300000>;
116 gpio-ranges = <&tlmm 0 0 230>;
H A Dqcom,x1e80100-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-2][0-9]|23[0-7])$"
110 reg = <0x0f100000 0xf00000>;
113 gpio-ranges = <&tlmm 0 0 239>;
H A Dqcom,sm6350-tlmm.yaml61 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
112 reg = <0x0f100000 0x300000>;
127 gpio-ranges = <&tlmm 0 0 157>;
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j722s-main.dtsi12 serdes_refclk: clk-0 {
14 #clock-cells = <0>;
15 clock-frequency = <0>;
22 ranges = <0x0f000000 0x0 0x0f000000 0x00010000>;
26 clocks = <&k3_clks 279 0>, <&k3_clks 279 1>, <&serdes_refclk>;
37 reg = <0x0f000000 0x00010000>;
39 resets = <&serdes_wiz0 0>;
51 #size-cells = <0>;
60 ranges = <0x0f010000 0x0 0x0f010000 0x00010000>;
64 clocks = <&k3_clks 280 0>, <&k3_clks 280 1>, <&serdes_refclk>;
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi29 reg = <0x03200000 0x800000>;
82 pinctrl-0 = <&backlight_i2c_default_state>;
88 #size-cells = <0>;
92 reg = <0x2c>;
94 dev-ctrl = /bits/ 8 <0x80>;
95 init-brt = /bits/ 8 <0x3f>;
97 pwms = <&backlight_pwm 0 100000>;
101 rom-addr = /bits/ 8 <0xa0>;
102 rom-val = /bits/ 8 <0x44>;
106 rom-addr = /bits/ 8 <0xa1>;
[all …]
H A Dqcom-apq8026-samsung-milletwifi.dts37 reg = <0x03200000 0x800000>;
90 pinctrl-0 = <&backlight_i2c_default_state>;
96 #size-cells = <0>;
100 reg = <0x2c>;
103 dev-ctrl = /bits/ 8 <0x80>;
104 init-brt = /bits/ 8 <0x3f>;
112 rom-addr = /bits/ 8 <0xa3>;
113 rom-val = /bits/ 8 <0x5e>;
118 * (0, 120deg, 240deg, -, -, -),
122 rom-addr = /bits/ 8 <0xa5>;
[all …]
/linux/drivers/video/fbdev/geode/
H A Dvideo_gx.c34 { 40123, POSTDIV3, 0x00000BF2 }, /* 24.9230 */
35 { 39721, 0, 0x00000037 }, /* 25.1750 */
36 { 35308, POSTDIV3|PREMULT2, 0x00000B1A }, /* 28.3220 */
37 { 31746, POSTDIV3, 0x000002D2 }, /* 31.5000 */
38 { 27777, POSTDIV3|PREMULT2, 0x00000FE2 }, /* 36.0000 */
39 { 26666, POSTDIV3, 0x0000057A }, /* 37.5000 */
40 { 25000, POSTDIV3, 0x0000030A }, /* 40.0000 */
41 { 22271, 0, 0x00000063 }, /* 44.9000 */
42 { 20202, 0, 0x0000054B }, /* 49.5000 */
43 { 20000, 0, 0x0000026E }, /* 50.0000 */
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dx1e80100.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
47 #clock-cells = <0>;
56 #clock-cells = <0>;
66 #size-cells = <0>;
68 cpu0: cpu@0 {
71 reg = <0x0 0x0>;
88 reg = <0x0 0x100>;
99 reg = <0x0 0x200>;
110 reg = <0x0 0x300>;
[all …]