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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,sm4450-tlmm.yaml66 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-5])$"
108 reg = <0x0f100000 0x300000>;
111 gpio-ranges = <&tlmm 0 0 137>;
H A Dqcom,sm8250-pinctrl.yaml63 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
109 reg = <0x0f100000 0x300000>,
110 <0x0f500000 0x300000>,
111 <0x0f90000
[all...]
H A Dqcom,sm8450-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
107 reg = <0x0f100000 0x300000>;
110 gpio-ranges = <&tlmm 0 0 21
[all...]
H A Dqcom,sdx75-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$"
104 reg = <0x0f100000 0x300000>;
107 gpio-ranges = <&tlmm 0 0 13
[all...]
H A Dqcom,sdx55-pinctrl.yaml53 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"
106 reg = <0x0f100000 0x300000>;
109 gpio-ranges = <&tlmm 0 0 108>;
H A Dqcom,sc8280xp-tlmm.yaml55 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$"
110 reg = <0x0f100000 0x30000
[all...]
H A Dqcom,sm8350-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-2])$"
108 reg = <0x0f100000 0x300000>;
114 gpio-ranges = <&tlmm 0 0 20
[all...]
H A Dqcom,sm8550-tlmm.yaml60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
121 reg = <0x0f100000 0x300000>;
124 gpio-ranges = <&tlmm 0 0 21
[all...]
H A Dqcom,sm8450-pinctrl.yaml71 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
120 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
132 reg = <0x0f100000 0x300000>;
135 gpio-ranges = <&tlmm 0 0 211>;
H A Dqcom,sm8350-pinctrl.yaml65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
116 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
128 reg = <0x0f100000 0x300000>;
134 gpio-ranges = <&tlmm 0 0 203>;
H A Dqcom,sm6350-tlmm.yaml61 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
112 reg = <0x0f100000 0x300000>;
127 gpio-ranges = <&tlmm 0 0 157>;
H A Dqcom,sc8280xp-pinctrl.yaml64 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$"
121 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$"
133 reg = <0x0f100000 0x300000>;
139 gpio-ranges = <&tlmm 0 0 230>;
H A Dqcom,sm6350-pinctrl.yaml65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$"
119 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$"
131 reg = <0x0f100000 0x300000>;
137 gpio-ranges = <&tlmm 0 0 157>;
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j722s-main.dtsi12 serdes_refclk: clk-0 {
14 #clock-cells = <0>;
15 clock-frequency = <0>;
22 ranges = <0x0f000000 0x0 0x0f000000 0x00010000>;
26 clocks = <&k3_clks 279 0>, <&k3_clks 279 1>, <&serdes_refclk>;
37 reg = <0x0f000000 0x00010000>;
39 resets = <&serdes_wiz0 0>;
51 #size-cells = <0>;
60 ranges = <0x0f010000 0x0 0x0f010000 0x00010000>;
64 clocks = <&k3_clks 280 0>, <&k3_clks 280 1>, <&serdes_refclk>;
[all …]
H A Dk3-am64-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x00 0x70000000 0x00 0x200000>;
25 ranges = <0x0 0x00 0x70000000 0x200000>;
28 reg = <0x1c0000 0x20000>;
32 reg = <0x1e0000 0x1c000>;
36 reg = <0x1fc000 0x4000>;
43 reg = <0x0 0x43000000 0x0 0x20000>;
46 ranges = <0x0 0x0 0x43000000 0x20000>;
51 reg = <0x00000014 0x4>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi29 reg = <0x03200000 0x800000>;
82 pinctrl-0 = <&backlight_i2c_default_state>;
88 #size-cells = <0>;
92 reg = <0x2c>;
94 dev-ctrl = /bits/ 8 <0x80>;
95 init-brt = /bits/ 8 <0x3f>;
97 pwms = <&backlight_pwm 0 100000>;
101 rom-addr = /bits/ 8 <0xa0>;
102 rom-val = /bits/ 8 <0x44>;
106 rom-addr = /bits/ 8 <0xa1>;
[all …]
H A Dqcom-apq8026-samsung-milletwifi.dts37 reg = <0x03200000 0x800000>;
90 pinctrl-0 = <&backlight_i2c_default_state>;
96 #size-cells = <0>;
100 reg = <0x2c>;
103 dev-ctrl = /bits/ 8 <0x80>;
104 init-brt = /bits/ 8 <0x3f>;
112 rom-addr = /bits/ 8 <0xa3>;
113 rom-val = /bits/ 8 <0x5e>;
118 * (0, 120deg, 240deg, -, -, -),
122 rom-addr = /bits/ 8 <0xa5>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm4450.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
37 #clock-cells = <0>;
47 #size-cells = <0>;
49 CPU0: cpu@0 {
52 reg = <0x0 0x0>;
53 clocks = <&cpufreq_hw 0>;
58 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x100>;
79 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsm6350.dtsi32 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #size-cells = <0>;
48 CPU0: cpu@0 {
51 reg = <0x0 0x0>;
52 clocks = <&cpufreq_hw 0>;
57 qcom,freq-domain = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
82 clocks = <&cpufreq_hw 0>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8350.dtsi38 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 CPU0: cpu@0 {
57 reg = <0x0 0x0>;
58 clocks = <&cpufreq_hw 0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
82 clocks = <&cpufreq_hw 0>;
85 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8550.dtsi38 #clock-cells = <0>;
43 #clock-cells = <0>;
47 #clock-cells = <0>;
55 #clock-cells = <0>;
65 #size-cells = <0>;
67 CPU0: cpu@0 {
70 reg = <0 0>;
71 clocks = <&cpufreq_hw 0>;
76 qcom,freq-domain = <&cpufreq_hw 0>;
96 reg = <0 0x100>;
[all …]
H A Dsm8450.dtsi39 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #size-cells = <0>;
54 CPU0: cpu@0 {
57 reg = <0x0 0x0>;
62 qcom,freq-domain = <&cpufreq_hw 0>;
64 clocks = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsm8650.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
59 #clock-cells = <0>;
69 #size-cells = <0>;
71 CPU0: cpu@0 {
74 reg = <0 0>;
76 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
107 reg = <0 0x100>;
[all …]
H A Dsc8280xp.dtsi33 #clock-cells = <0>;
38 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
58 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x100>;
79 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dx1e80100.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
47 #clock-cells = <0>;
56 #clock-cells = <0>;
66 #size-cells = <0>;
68 CPU0: cpu@0 {
71 reg = <0x0 0x0>;
88 reg = <0x0 0x100>;
99 reg = <0x0 0x200>;
110 reg = <0x0 0x300>;
[all …]

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