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/freebsd/sys/contrib/device-tree/Bindings/i3c/
H A Dcdns,i3c-master.yaml48 interrupts = <3 0>;
49 reg = <0x0d040000 0x1000>;
51 #size-cells = <0>;
56 reg = <0x57 0x0 0x10>;
57 pagesize = <0x8>;
H A Dcdns,i3c-master.txt16 - #size-cells: shall be set to 0
29 i3c-master@0d040000 {
33 interrupts = <3 0>;
34 reg = <0x0d040000 0x1000>;
36 #size-cells = <0>;
41 reg = <0x52 0x0 0x10>;
H A Di3c.yaml20 pattern: "^i3c@[0-9a-f]+$"
40 const: 0
69 "@[0-9a-f]+$":
89 minimum: 0
90 maximum: 0x7f
91 - const: 0
97 * 0: I2C device has a 50 ns spike filter
105 * 0: FM+ mode
107 bit[3:0]: device type
108 * 0-15: reserved
[all …]
H A Di3c.txt11 - #size-cells - should be <0>.
46 + second cell: shall be 0
51 * 0: I2C device has a 50 ns spike filter
59 * 0: FM+ mode
62 bit[3:0]: device type
63 * 0-15: reserved
90 + first cell : encodes the static I2C address. Should be 0 if the device does
91 not have one (0 is not a valid I2C address).
105 address (first cell of the reg property != 0).
114 interrupts = <3 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dwii.dts20 /*/memreserve/ 0x10000000 0x0004000;*/ /* DSP RAM */
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
35 0x10000000 0x04000000>; /* MEM2 64MB GDDR3 */
40 #size-cells = <0>;
42 PowerPC,broadway@0 {
44 reg = <0>;
60 ranges = <0x0c000000 0x0c000000 0x01000000
61 0x0d000000 0x0d000000 0x00800000
62 0x0d800000 0x0d800000 0x00800000>;
68 reg = <0x0c002000 0x100>;
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]