Searched +full:0 +full:x0c223000 (Results 1 – 4 of 4) sorted by relevance
35 0 on sensor nodes with only a single sensor and at least 1 on nodes37 enum: [0, 1]57 reg = <0 0x0c263000 0 0x1ff>, /* TM */58 <0 0x0c222000 0 0x1ff>; /* SROT */68 reg = <0 0x0c265000 0 0x1ff>, /* TM */69 <0 0x0c223000 0 0x1ff>; /* SROT */
68 checking this thermal zone. Setting this to 0 disables the polling77 this to 0 disables the polling timers setup by the thermal134 "^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$":254 reg = <0 0x0c263000 0 0x1ff>, /* TM */255 <0 0x0c222000 0 0x1ff>; /* SROT */265 reg = <0 0x0c265000 0 0x1ff>, /* TM */266 <0 0x0c223000 0 0x1ff>; /* SROT */
30 #clock-cells = <0>;35 #clock-cells = <0>;41 #size-cells = <0>;43 cpu0: cpu@0 {46 reg = <0x0 0x0>;50 qcom,freq-domain = <&cpufreq_hw 0>;70 reg = <0x0 0x100>;74 qcom,freq-domain = <&cpufreq_hw 0>;89 reg = <0x0 0x200>;93 qcom,freq-domain = <&cpufreq_hw 0>;[all …]
36 #clock-cells = <0>;42 #clock-cells = <0>;47 #clock-cells = <0>;56 #clock-cells = <0>;66 #size-cells = <0>;68 cpu0: cpu@0 {71 reg = <0x0 0x0>;88 reg = <0x0 0x100>;99 reg = <0x0 0x200>;110 reg = <0x0 0x300>;[all …]