Searched +full:0 +full:x0ae97200 (Results 1 – 7 of 7) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | qcom,sm8650-mdss.yaml | 42 "^display-controller@[0-9a-f]+$":
49 "^displayport-controller@[0-9a-f]+$":
56 "^dsi@[0-9a-f]+$":
65 "^phy@[0-9a-f]+$":
86 reg = <0x0ae00000 0x1000>;
89 interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>,
90 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>;
106 iommus = <&apps_smmu 0x1c00 0x2>;
114 reg = <0x0ae01000 0x8f000>,
115 <0x0aeb0000 0x2008>;
[all …]
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| H A D | qcom,sm8550-mdss.yaml | 43 "^display-controller@[0-9a-f]+$":
51 "^displayport-controller@[0-9a-f]+$":
61 "^dsi@[0-9a-f]+$":
71 "^phy@[0-9a-f]+$":
95 reg = <0x0ae00000 0x1000>;
98 interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>,
99 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>;
116 iommus = <&apps_smmu 0x1c00 0x2>;
124 reg = <0x0ae01000 0x8f000>,
125 <0x0aeb0000 0x2008>;
[all …]
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| H A D | qcom,sm8750-mdss.yaml | 42 "^display-controller@[0-9a-f]+$":
49 "^displayport-controller@[0-9a-f]+$":
57 "^dsi@[0-9a-f]+$":
65 "^phy@[0-9a-f]+$":
88 reg = <0x0ae00000 0x1000>;
108 iommus = <&apps_smmu 0x800 0x2>;
119 reg = <0x0ae01000 0x93000>,
120 <0x0aeb0000 0x2008>;
124 interrupts-extended = <&mdss 0>;
146 #size-cells = <0>;
[all …]
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| H A D | qcom,sar2130p-mdss.yaml | 43 "^display-controller@[0-9a-f]+$":
50 "^displayport-controller@[0-9a-f]+$":
58 "^dsi@[0-9a-f]+$":
66 "^phy@[0-9a-f]+$":
86 reg = <0x0ae00000 0x1000>;
107 iommus = <&apps_smmu 0x1c00 0x2>;
115 reg = <0x0ae01000 0x8f000>,
116 <0x0aeb0000 0x2008>;
139 interrupts = <0>;
143 #size-cells = <0>;
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sar2130p.dtsi | 34 #clock-cells = <0>;
40 #clock-cells = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0x0 0x0>;
53 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x100>;
79 clocks = <&cpufreq_hw 0>;
82 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
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| H A D | sm8550.dtsi | 40 #clock-cells = <0>;
45 #clock-cells = <0>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
67 #size-cells = <0>;
69 cpu0: cpu@0 {
72 reg = <0 0>;
73 clocks = <&cpufreq_hw 0>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0 0x100>;
[all …]
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| H A D | sm8650.dtsi | 42 #clock-cells = <0>;
47 #clock-cells = <0>;
52 #clock-cells = <0>;
61 #clock-cells = <0>;
71 #size-cells = <0>;
73 cpu0: cpu@0 {
76 reg = <0 0>;
78 clocks = <&cpufreq_hw 0>;
88 qcom,freq-domain = <&cpufreq_hw 0>;
118 reg = <0 0x100>;
[all …]
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